设计制造接口。1 .视觉[VLSI]

Wojciech Maly, H. Heineken, J. Khare, P. Nag
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引用次数: 4

摘要

本文对超大规模集成电路设计与制造之间的接口这一新的研究领域提出了展望。该领域的关键目标是最大限度地减少设计和制造之间的不匹配,这种不匹配随着VLSI设计和IC技术的复杂性的增加而迅速增长。这一广泛目标分为若干具体任务。通常,最重要的任务之一是从制造效率的角度提取可能相关的VLSI设计属性。第二项任务是进行良率分析,以检测导致良率不足的工艺和设计属性。本文假设两者,设计制造界面的整体变化,以及解决日益增长的设计制造不匹配的方法。本文还讨论了为此目的所需的一些工具的属性。
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Design-manufacturing interface. I. Vision [VLSI]
This paper proposes a vision for a new research domain emerging on the interface between design and manufacturing of VLSI circuits. The key objective of this domain is the minimization of the mismatch between design and manufacturing which is rapidly growing with the increase in complexity of VLSI designs and IC technologies. This broad objective is partitioned into a number of specific tasks. Often, one of the most important tasks is the extraction of VLSI design attributes that may be relevant from a manufacturing efficiency standpoint. The second task is yield analysis performed to detect process and design attributes responsible for inadequate yield. This paper postulates both, an overall change in the design-manufacturing interface, as well as a methodology to address the growing design-manufacturing mismatch. Attributes of a number of tools needed for this purpose are discussed as well.
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