学习卷积神经网络在空间可编程架构上的数据流图映射(仅摘要)

S. Yin, Dajiang Liu, Lifeng Sun, Xinhan Lin, Leibo Liu, Shaojun Wei
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引用次数: 1

摘要

数据流图(DFG)映射对于空间可编程架构的编译至关重要,其中编译时间是上市时间要求和映射成功率的关键因素。受深度神经网络在树搜索游戏中取得的巨大进展的启发,我们提出了一个学习卷积神经网络的框架,用于将DFGs映射到空间可编程架构。考虑到映射是一个从源到目标的过程,我们提出了一个双输入神经网络,从应用程序中的DFGs和空间可编程架构中的过程元素阵列(process Element Array, PEA)中捕获特征。为了训练神经网络,设计了从预处理DFG的PEA中间状态自动生成数据集的算法。最后,我们证明了训练后的神经网络可以获得较高的映射质量识别精度,并且我们提出的映射方法在性能上与最先进的DFG映射算法相竞争,同时大大减少了编译时间。
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Learning Convolutional Neural Networks for Data-Flow Graph Mapping on Spatial Programmable Architectures (Abstract Only)
Data flow graph (DFG) mapping is critical for the compiling of spatial programmable architecture, where compilation time is a key factor for both time-to-market requirement and mapping successful rate. Inspired from the great progress made in tree search game using deep neural network, we proposed a framework for learning convolutional neural networks for mapping DFGs onto spatial programmable architectures. Considering that mapping is a process from source to target, we present a dual-input neural network capturing features from both DFGs in applications and Process Element Array (PEA) in spatial programmable architectures. In order to train the neural network, algorithms are designed to automatically generate a data set from PEA intermediate states of preprocessed DFG. Finally, we demonstrate that the trained neural network can get high identifying accuracy of mapping quality and our proposed mapping approach are competitive with state-of-the-art DFG mapping algorithms in performance while the compilation time is greatly reduced.
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Session details: CAD Tools CPU-FPGA Co-Optimization for Big Data Applications: A Case Study of In-Memory Samtool Sorting (Abstract Only) Session details: Graph Processing Applications ASAP: Accelerated Short Read Alignment on Programmable Hardware (Abstract Only) Learning Convolutional Neural Networks for Data-Flow Graph Mapping on Spatial Programmable Architectures (Abstract Only)
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