{"title":"模拟共享内存noc的高效屏障同步机制","authors":"M. Forsell","doi":"10.1109/ISSOC.2004.1411139","DOIUrl":null,"url":null,"abstract":"Explicit synchronization mechanisms capable of arbitrary simultaneous barriers are needed to support parallely recursive synchronous MIMD programming, even in step synchronous emulated shared memory machines (ESMM) because control of threads may privately depend on input values. Current synchronization mechanisms fail to support arbitrary simultaneous barriers or are not scalable with future silicon technologies. In this paper, we propose a novel constant execution time barrier synchronization mechanism for scalable ESMMs using active memory. The mechanism is applied to our Eclipse network-on-chip architecture and evaluated briefly.","PeriodicalId":268122,"journal":{"name":"2004 International Symposium on System-on-Chip, 2004. Proceedings.","volume":"26 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2004-11-16","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"2","resultStr":"{\"title\":\"Efficient barrier synchronization mechanism for emulated shared memory NOCs\",\"authors\":\"M. Forsell\",\"doi\":\"10.1109/ISSOC.2004.1411139\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"Explicit synchronization mechanisms capable of arbitrary simultaneous barriers are needed to support parallely recursive synchronous MIMD programming, even in step synchronous emulated shared memory machines (ESMM) because control of threads may privately depend on input values. Current synchronization mechanisms fail to support arbitrary simultaneous barriers or are not scalable with future silicon technologies. In this paper, we propose a novel constant execution time barrier synchronization mechanism for scalable ESMMs using active memory. The mechanism is applied to our Eclipse network-on-chip architecture and evaluated briefly.\",\"PeriodicalId\":268122,\"journal\":{\"name\":\"2004 International Symposium on System-on-Chip, 2004. Proceedings.\",\"volume\":\"26 1\",\"pages\":\"0\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"2004-11-16\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"2\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"2004 International Symposium on System-on-Chip, 2004. Proceedings.\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1109/ISSOC.2004.1411139\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"2004 International Symposium on System-on-Chip, 2004. Proceedings.","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/ISSOC.2004.1411139","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
Efficient barrier synchronization mechanism for emulated shared memory NOCs
Explicit synchronization mechanisms capable of arbitrary simultaneous barriers are needed to support parallely recursive synchronous MIMD programming, even in step synchronous emulated shared memory machines (ESMM) because control of threads may privately depend on input values. Current synchronization mechanisms fail to support arbitrary simultaneous barriers or are not scalable with future silicon technologies. In this paper, we propose a novel constant execution time barrier synchronization mechanism for scalable ESMMs using active memory. The mechanism is applied to our Eclipse network-on-chip architecture and evaluated briefly.
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