{"title":"一个BiCMOS全差分10位40 MHz流水线ADC","authors":"T. Shu, K. Bacrania, R. Gokhale","doi":"10.1109/BIPOL.1995.493887","DOIUrl":null,"url":null,"abstract":"A BiCMOS fully-differential, 10-bit, 40 MHz pipelined ADC has been developed. The ADC can digitize not only a fully-differential but also a single-ended signal over a wide input range with little variation in performance. At f/sub s/=40 MHz, the ADC exhibits a signal-to-(noise+distortion) ratio (SNDR) of 57.1 dB and consumes <400 mW from a single 5-V supply.","PeriodicalId":230944,"journal":{"name":"Proceedings of Bipolar/Bicmos Circuits and Technology Meeting","volume":"25 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"1995-10-02","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"1","resultStr":"{\"title\":\"A BiCMOS fully-differential 10-bit 40 MHz pipelined ADC\",\"authors\":\"T. Shu, K. Bacrania, R. Gokhale\",\"doi\":\"10.1109/BIPOL.1995.493887\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"A BiCMOS fully-differential, 10-bit, 40 MHz pipelined ADC has been developed. The ADC can digitize not only a fully-differential but also a single-ended signal over a wide input range with little variation in performance. At f/sub s/=40 MHz, the ADC exhibits a signal-to-(noise+distortion) ratio (SNDR) of 57.1 dB and consumes <400 mW from a single 5-V supply.\",\"PeriodicalId\":230944,\"journal\":{\"name\":\"Proceedings of Bipolar/Bicmos Circuits and Technology Meeting\",\"volume\":\"25 1\",\"pages\":\"0\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"1995-10-02\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"1\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"Proceedings of Bipolar/Bicmos Circuits and Technology Meeting\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1109/BIPOL.1995.493887\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"Proceedings of Bipolar/Bicmos Circuits and Technology Meeting","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/BIPOL.1995.493887","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
A BiCMOS fully-differential 10-bit 40 MHz pipelined ADC
A BiCMOS fully-differential, 10-bit, 40 MHz pipelined ADC has been developed. The ADC can digitize not only a fully-differential but also a single-ended signal over a wide input range with little variation in performance. At f/sub s/=40 MHz, the ADC exhibits a signal-to-(noise+distortion) ratio (SNDR) of 57.1 dB and consumes <400 mW from a single 5-V supply.
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