M. Wielgosz, Mauritz Panggabean, Ameen Chilwan, L. A. Rønningen
{"title":"基于fpga的实时互联网平台","authors":"M. Wielgosz, Mauritz Panggabean, Ameen Chilwan, L. A. Rønningen","doi":"10.1109/EST.2012.18","DOIUrl":null,"url":null,"abstract":"Field-programmable gate arrays (FPGAs) are widely used in telecommunication due their substantial computational power and flexibly designed architecture. These features become especially important for applications of low transmission latency such as those supported by Distributed Multimedia Plays (DMP) architecture. Thus FPGAs are chosen in this work as the core building block of the system. Complex multi-node telecommunication systems require special design methodology contrary to small ICT applications usually implemented in HDL. The methodology should be based on the appropriate tools from FPGA vendors for support and maintenance. This paper presents an architecture of a module to be embedded in all the FPGA-based nodes constituting a platform for the Real Time Internet based on DMP. It is designed using an embedded development kit natively supported by Xilinx and flexible in available cores. We present the implementation results of the network-node module and the description of PCIe-based protocol for inter-FPGA communication.","PeriodicalId":314247,"journal":{"name":"2012 Third International Conference on Emerging Security Technologies","volume":"18 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2012-09-05","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"6","resultStr":"{\"title\":\"FPGA-Based Platform for Real-Time Internet\",\"authors\":\"M. Wielgosz, Mauritz Panggabean, Ameen Chilwan, L. A. Rønningen\",\"doi\":\"10.1109/EST.2012.18\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"Field-programmable gate arrays (FPGAs) are widely used in telecommunication due their substantial computational power and flexibly designed architecture. These features become especially important for applications of low transmission latency such as those supported by Distributed Multimedia Plays (DMP) architecture. Thus FPGAs are chosen in this work as the core building block of the system. Complex multi-node telecommunication systems require special design methodology contrary to small ICT applications usually implemented in HDL. The methodology should be based on the appropriate tools from FPGA vendors for support and maintenance. This paper presents an architecture of a module to be embedded in all the FPGA-based nodes constituting a platform for the Real Time Internet based on DMP. It is designed using an embedded development kit natively supported by Xilinx and flexible in available cores. We present the implementation results of the network-node module and the description of PCIe-based protocol for inter-FPGA communication.\",\"PeriodicalId\":314247,\"journal\":{\"name\":\"2012 Third International Conference on Emerging Security Technologies\",\"volume\":\"18 1\",\"pages\":\"0\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"2012-09-05\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"6\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"2012 Third International Conference on Emerging Security Technologies\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1109/EST.2012.18\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"2012 Third International Conference on Emerging Security Technologies","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/EST.2012.18","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
Field-programmable gate arrays (FPGAs) are widely used in telecommunication due their substantial computational power and flexibly designed architecture. These features become especially important for applications of low transmission latency such as those supported by Distributed Multimedia Plays (DMP) architecture. Thus FPGAs are chosen in this work as the core building block of the system. Complex multi-node telecommunication systems require special design methodology contrary to small ICT applications usually implemented in HDL. The methodology should be based on the appropriate tools from FPGA vendors for support and maintenance. This paper presents an architecture of a module to be embedded in all the FPGA-based nodes constituting a platform for the Real Time Internet based on DMP. It is designed using an embedded development kit natively supported by Xilinx and flexible in available cores. We present the implementation results of the network-node module and the description of PCIe-based protocol for inter-FPGA communication.