Dynamic priority schemes for fast packet switches

It is well known that ATM switches with a shared input queue perform better than switches with separated input queueing. Nevertheless, most existing ATM switches have certain forms of separated input queueing. We study a class of dynamic priority schemes which can facilitate buffer sharing and delay guarantee for input queueing switches, and can guarantee the switching delay. Buffer sharing is achieved by the queueing control priority discipline (QCPD), which assigns a higher priority to an input queue which has more queued packets. Delay guarantee is achieved by the blocking control priority discipline (BCPD), which assigns the highest priority to a HOL cell which has been blocked for more than a certain number of times. We show that a combination of the two, the hybrid control priority discipline (HCPD), can achieve both benefits.