Data and buffer management in ATM systems

The paper discusses the handling of data traffic, at an end-user host or access concentrator performing network adaptation functions, in a high speed asynchronous transfer mode (ATM) network environment. The challenges of handling data traffic in high speed networks are the processing power and space requirements. The hardware implementation of the required protocol processing, through a high gate density application specific integrated circuit (ASIC), provides much of the processing power; however, the space requirements for data handling are still demanding. From the reasons of cost and space, on a network adapter card, often such ASICs rely upon the host for data buffers in the host memory in addition to control and configuration. Such a reliance places demand on the host memory and requires a data and buffer management mechanism that provides a framework for optimization of the memory utilization and data packet latency. The design and implementation details of one such data and buffer management mechanism, the scatter and gather mechanism, are discussed in the paper.