mu BTRON母线的性能评价

K. Tanaka, Y. Shimizu, K. Tamai, S. Tsunoda, H. Kato
{"title":"mu BTRON母线的性能评价","authors":"K. Tanaka, Y. Shimizu, K. Tamai, S. Tsunoda, H. Kato","doi":"10.1109/TRON.1992.313270","DOIUrl":null,"url":null,"abstract":"The mu BTRON bus is a simp yet fast LAN, used to connect electronic stationery goods to the BTRON workstations. The specifications of the mu BTRON bus feature fast real-time performance with the ability to transfer blocks of mass data at reasonably high speed, and cost effectiveness. Yamaha has developed the LSI, called CML2, to implement the mu BTRON bus specifications. In order to confirm whether the CML2 met the expected performance requirements of the mu BTRON bus, a series of tests were made and the performance parameters were actually measured. In the tests, the CML2 was built on a VME board, where 68000 MPU controlled the CML2 LSI as well as carrying out some on board test programs. The result showed that CML2's performance sufficiently met the original expectation of the mu BTRON bus specifications by achieving a data transfer rate of up to 386 Kbytes per second, or a frame transfer rate of 10490 frames per second maximum.<<ETX>>","PeriodicalId":275803,"journal":{"name":"Proceedings [1992] The Ninth TRON Project Symposium","volume":"1 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"1992-12-02","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"0","resultStr":"{\"title\":\"Performance evaluation of the mu BTRON bus\",\"authors\":\"K. Tanaka, Y. Shimizu, K. Tamai, S. Tsunoda, H. Kato\",\"doi\":\"10.1109/TRON.1992.313270\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"The mu BTRON bus is a simp yet fast LAN, used to connect electronic stationery goods to the BTRON workstations. The specifications of the mu BTRON bus feature fast real-time performance with the ability to transfer blocks of mass data at reasonably high speed, and cost effectiveness. Yamaha has developed the LSI, called CML2, to implement the mu BTRON bus specifications. In order to confirm whether the CML2 met the expected performance requirements of the mu BTRON bus, a series of tests were made and the performance parameters were actually measured. In the tests, the CML2 was built on a VME board, where 68000 MPU controlled the CML2 LSI as well as carrying out some on board test programs. The result showed that CML2's performance sufficiently met the original expectation of the mu BTRON bus specifications by achieving a data transfer rate of up to 386 Kbytes per second, or a frame transfer rate of 10490 frames per second maximum.<<ETX>>\",\"PeriodicalId\":275803,\"journal\":{\"name\":\"Proceedings [1992] The Ninth TRON Project Symposium\",\"volume\":\"1 1\",\"pages\":\"0\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"1992-12-02\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"0\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"Proceedings [1992] The Ninth TRON Project Symposium\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1109/TRON.1992.313270\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"Proceedings [1992] The Ninth TRON Project Symposium","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/TRON.1992.313270","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
引用次数: 0

摘要

mu BTRON总线是一种简单而快速的局域网,用于将电子文具产品连接到BTRON工作站。mu BTRON总线的规格具有快速实时性能,能够以相当高的速度传输大量数据块,并且具有成本效益。雅马哈开发了称为CML2的大规模集成电路,以实现mu BTRON总线规格。为了确认CML2是否满足mu BTRON总线的预期性能要求,我们进行了一系列的测试,并实际测量了性能参数。在测试中,CML2构建在VME板上,其中68000个MPU控制CML2 LSI并执行一些板上测试程序。结果表明,CML2的数据传输速率可达386 kb / s,帧传输速率最高可达10490帧/ s,充分满足了mu BTRON总线规范的最初期望
本文章由计算机程序翻译,如有差异,请以英文原文为准。
查看原文
分享 分享
微信好友 朋友圈 QQ好友 复制链接
本刊更多论文
Performance evaluation of the mu BTRON bus
The mu BTRON bus is a simp yet fast LAN, used to connect electronic stationery goods to the BTRON workstations. The specifications of the mu BTRON bus feature fast real-time performance with the ability to transfer blocks of mass data at reasonably high speed, and cost effectiveness. Yamaha has developed the LSI, called CML2, to implement the mu BTRON bus specifications. In order to confirm whether the CML2 met the expected performance requirements of the mu BTRON bus, a series of tests were made and the performance parameters were actually measured. In the tests, the CML2 was built on a VME board, where 68000 MPU controlled the CML2 LSI as well as carrying out some on board test programs. The result showed that CML2's performance sufficiently met the original expectation of the mu BTRON bus specifications by achieving a data transfer rate of up to 386 Kbytes per second, or a frame transfer rate of 10490 frames per second maximum.<>
求助全文
通过发布文献求助,成功后即可免费获取论文全文。 去求助
来源期刊
自引率
0.00%
发文量
0
期刊最新文献
Performance evaluation of the mu BTRON bus TRON-specification CHIP compatibility validation The future of advanced user interfaces in product design Optimizing C compiler for the TRON architecture Design and implementation of the EnableWare specification-a human-machine interface for physically challenging people
×
引用
GB/T 7714-2015
复制
MLA
复制
APA
复制
导出至
BibTeX EndNote RefMan NoteFirst NoteExpress
×
×
提示
您的信息不完整,为了账户安全,请先补充。
现在去补充
×
提示
您因"违规操作"
具体请查看互助需知
我知道了
×
提示
现在去查看 取消
×
提示
确定
0
微信
客服QQ
Book学术公众号 扫码关注我们
反馈
×
意见反馈
请填写您的意见或建议
请填写您的手机或邮箱
已复制链接
已复制链接
快去分享给好友吧!
我知道了
×
扫码分享
扫码分享
Book学术官方微信
Book学术文献互助
Book学术文献互助群
群 号:481959085
Book学术
文献互助 智能选刊 最新文献 互助须知 联系我们:info@booksci.cn
Book学术提供免费学术资源搜索服务,方便国内外学者检索中英文文献。致力于提供最便捷和优质的服务体验。
Copyright © 2023 Book学术 All rights reserved.
ghs 京公网安备 11010802042870号 京ICP备2023020795号-1