K. Tanaka, Y. Shimizu, K. Tamai, S. Tsunoda, H. Kato
{"title":"mu BTRON母线的性能评价","authors":"K. Tanaka, Y. Shimizu, K. Tamai, S. Tsunoda, H. Kato","doi":"10.1109/TRON.1992.313270","DOIUrl":null,"url":null,"abstract":"The mu BTRON bus is a simp yet fast LAN, used to connect electronic stationery goods to the BTRON workstations. The specifications of the mu BTRON bus feature fast real-time performance with the ability to transfer blocks of mass data at reasonably high speed, and cost effectiveness. Yamaha has developed the LSI, called CML2, to implement the mu BTRON bus specifications. In order to confirm whether the CML2 met the expected performance requirements of the mu BTRON bus, a series of tests were made and the performance parameters were actually measured. In the tests, the CML2 was built on a VME board, where 68000 MPU controlled the CML2 LSI as well as carrying out some on board test programs. The result showed that CML2's performance sufficiently met the original expectation of the mu BTRON bus specifications by achieving a data transfer rate of up to 386 Kbytes per second, or a frame transfer rate of 10490 frames per second maximum.<<ETX>>","PeriodicalId":275803,"journal":{"name":"Proceedings [1992] The Ninth TRON Project Symposium","volume":"1 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"1992-12-02","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"0","resultStr":"{\"title\":\"Performance evaluation of the mu BTRON bus\",\"authors\":\"K. Tanaka, Y. Shimizu, K. Tamai, S. Tsunoda, H. Kato\",\"doi\":\"10.1109/TRON.1992.313270\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"The mu BTRON bus is a simp yet fast LAN, used to connect electronic stationery goods to the BTRON workstations. The specifications of the mu BTRON bus feature fast real-time performance with the ability to transfer blocks of mass data at reasonably high speed, and cost effectiveness. Yamaha has developed the LSI, called CML2, to implement the mu BTRON bus specifications. In order to confirm whether the CML2 met the expected performance requirements of the mu BTRON bus, a series of tests were made and the performance parameters were actually measured. In the tests, the CML2 was built on a VME board, where 68000 MPU controlled the CML2 LSI as well as carrying out some on board test programs. The result showed that CML2's performance sufficiently met the original expectation of the mu BTRON bus specifications by achieving a data transfer rate of up to 386 Kbytes per second, or a frame transfer rate of 10490 frames per second maximum.<<ETX>>\",\"PeriodicalId\":275803,\"journal\":{\"name\":\"Proceedings [1992] The Ninth TRON Project Symposium\",\"volume\":\"1 1\",\"pages\":\"0\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"1992-12-02\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"0\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"Proceedings [1992] The Ninth TRON Project Symposium\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1109/TRON.1992.313270\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"Proceedings [1992] The Ninth TRON Project Symposium","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/TRON.1992.313270","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
The mu BTRON bus is a simp yet fast LAN, used to connect electronic stationery goods to the BTRON workstations. The specifications of the mu BTRON bus feature fast real-time performance with the ability to transfer blocks of mass data at reasonably high speed, and cost effectiveness. Yamaha has developed the LSI, called CML2, to implement the mu BTRON bus specifications. In order to confirm whether the CML2 met the expected performance requirements of the mu BTRON bus, a series of tests were made and the performance parameters were actually measured. In the tests, the CML2 was built on a VME board, where 68000 MPU controlled the CML2 LSI as well as carrying out some on board test programs. The result showed that CML2's performance sufficiently met the original expectation of the mu BTRON bus specifications by achieving a data transfer rate of up to 386 Kbytes per second, or a frame transfer rate of 10490 frames per second maximum.<>