{"title":"利用模拟器分析功率MOSFET击穿电压","authors":"M. Chrzanowska-Jeske","doi":"10.1109/CIPE.1996.612349","DOIUrl":null,"url":null,"abstract":"A comprehensive analysis of the performance of the power MOSFET using process and device simulators is described. The power MOSFET process is simulated using TSUPREM and the simulated profile is used as an input to MEDICI to simulate the device performance. The dependence of the breakdown voltage on the device parameters, epi-layer thickness and doping concentration, and the parameter variations are used to establish the values of design parameters for the target breakdown voltage and desired yield.","PeriodicalId":126938,"journal":{"name":"5th IEEE Workshop on Computers in Power Electronics","volume":null,"pages":null},"PeriodicalIF":0.0000,"publicationDate":"1996-08-11","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"0","resultStr":"{\"title\":\"Analyzing power MOSFET breakdown voltage using simulators\",\"authors\":\"M. Chrzanowska-Jeske\",\"doi\":\"10.1109/CIPE.1996.612349\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"A comprehensive analysis of the performance of the power MOSFET using process and device simulators is described. The power MOSFET process is simulated using TSUPREM and the simulated profile is used as an input to MEDICI to simulate the device performance. The dependence of the breakdown voltage on the device parameters, epi-layer thickness and doping concentration, and the parameter variations are used to establish the values of design parameters for the target breakdown voltage and desired yield.\",\"PeriodicalId\":126938,\"journal\":{\"name\":\"5th IEEE Workshop on Computers in Power Electronics\",\"volume\":null,\"pages\":null},\"PeriodicalIF\":0.0000,\"publicationDate\":\"1996-08-11\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"0\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"5th IEEE Workshop on Computers in Power Electronics\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1109/CIPE.1996.612349\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"5th IEEE Workshop on Computers in Power Electronics","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/CIPE.1996.612349","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
Analyzing power MOSFET breakdown voltage using simulators
A comprehensive analysis of the performance of the power MOSFET using process and device simulators is described. The power MOSFET process is simulated using TSUPREM and the simulated profile is used as an input to MEDICI to simulate the device performance. The dependence of the breakdown voltage on the device parameters, epi-layer thickness and doping concentration, and the parameter variations are used to establish the values of design parameters for the target breakdown voltage and desired yield.
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