{"title":"GSM系统GMSK调制器,在FPGA上的经济实现","authors":"K.M Nitin Babu, K. K. Vinaymurthi","doi":"10.1109/ICCSP.2011.5739302","DOIUrl":null,"url":null,"abstract":"This paper demonstrates an economical implementation of Gaussian Minimum shift keying (GMSK) modulator for Global System for Mobile communication (GSM) system using the basics of direct waveform synthesis. This method makes use of pre-calculated filter response of Gaussian filter for pulse shaping and Phase concatenation circuit for accumulation. Baseband in-phase and quadrature-phase component generation using quarter Sine or Cosine waveform LUT. (Further these signals are given for up-conversion.) Hardware realization is done using VHDL; circuits are synthesized. Prototyped our design in Altera Cyclone-3 FPGA (Field Programmable Gate Array), verified using R&S (Rhode and Schwarz) Vector signal analyzer. The design and hardware implementation of this modulator was done for indigenous GSM BTS (Base transceiver station) project.","PeriodicalId":408736,"journal":{"name":"2011 International Conference on Communications and Signal Processing","volume":"1 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2011-03-24","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"12","resultStr":"{\"title\":\"GMSK modulator for GSM system, an economical implementation on FPGA\",\"authors\":\"K.M Nitin Babu, K. K. Vinaymurthi\",\"doi\":\"10.1109/ICCSP.2011.5739302\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"This paper demonstrates an economical implementation of Gaussian Minimum shift keying (GMSK) modulator for Global System for Mobile communication (GSM) system using the basics of direct waveform synthesis. This method makes use of pre-calculated filter response of Gaussian filter for pulse shaping and Phase concatenation circuit for accumulation. Baseband in-phase and quadrature-phase component generation using quarter Sine or Cosine waveform LUT. (Further these signals are given for up-conversion.) Hardware realization is done using VHDL; circuits are synthesized. Prototyped our design in Altera Cyclone-3 FPGA (Field Programmable Gate Array), verified using R&S (Rhode and Schwarz) Vector signal analyzer. The design and hardware implementation of this modulator was done for indigenous GSM BTS (Base transceiver station) project.\",\"PeriodicalId\":408736,\"journal\":{\"name\":\"2011 International Conference on Communications and Signal Processing\",\"volume\":\"1 1\",\"pages\":\"0\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"2011-03-24\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"12\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"2011 International Conference on Communications and Signal Processing\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1109/ICCSP.2011.5739302\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"2011 International Conference on Communications and Signal Processing","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/ICCSP.2011.5739302","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
GMSK modulator for GSM system, an economical implementation on FPGA
This paper demonstrates an economical implementation of Gaussian Minimum shift keying (GMSK) modulator for Global System for Mobile communication (GSM) system using the basics of direct waveform synthesis. This method makes use of pre-calculated filter response of Gaussian filter for pulse shaping and Phase concatenation circuit for accumulation. Baseband in-phase and quadrature-phase component generation using quarter Sine or Cosine waveform LUT. (Further these signals are given for up-conversion.) Hardware realization is done using VHDL; circuits are synthesized. Prototyped our design in Altera Cyclone-3 FPGA (Field Programmable Gate Array), verified using R&S (Rhode and Schwarz) Vector signal analyzer. The design and hardware implementation of this modulator was done for indigenous GSM BTS (Base transceiver station) project.