驾驶员辅助系统中高效多核ECU开发的虚拟样机

Rainer Kiesel, M. Streubühr, C. Haubelt, A. Terzis, J. Teich
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引用次数: 0

摘要

近年来,道路车辆的驾驶辅助系统如交通标志识别、车道偏离警告、行人检测等有了巨大的增长。为这些系统开发具有成本效益的电子控制单元(ecu)是一个复杂的挑战。缩短上市时间的需求使得开发更具挑战性,因此需要高效的设计流程。本文提出了一种基于模型的设计流程,允许在预开发阶段对驾驶员辅助系统的多核ecu进行基于仿真的性能评估。该方法基于多核ECU的系统级虚拟原型,并允许通过将应用程序任务映射到不同平台来评估时序效果。结果表明,即使在预开发阶段,也可以对不同的并行候选实现进行高精度的性能估计。通过对最终ECU采用最合适的并行化策略,可以缩短产品上市时间。目前,戴姆勒公司正在对设计流程进行评估,并将其应用于行人检测系统。这个应用程序的结果说明了所提出的方法的好处。
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Virtual prototyping for efficient multi-core ECU development of driver assistance systems
In recent years, road vehicles have experienced an enormous increase in driver assistance systems such as traffic sign recognition, lane departure warning, and pedestrian detection. Cost-efficient development of electronic control units (ECUs) for these systems is a complex challenge. The demand for shortened time to market makes the development even more challenging and thus demands efficient design flows. This paper proposes a model-based design flow that permits simulation-based performance evaluation of multi-core ECUs for driver assistance systems in a pre-development stage. The approach is based on a system-level virtual prototype of a multi-core ECU and allows the evaluation of timing effects by mapping application tasks to different platforms. The results show that performance estimation of different parallel implementation candidates is possible with high accuracy even in a pre-development stage. By adapting the best-fitting parallelization strategy to the final ECU, a reduction in the time to market period is possible. Currently, the design flow is being evaluated by Daimler AG and is being applied to a pedestrian detection system. Results from this application illustrate the benefits of the proposed approach.
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Instrumentation techniques for cyber-physical systems using the targeted dataflow interchange format Efficient system design using the Statistical Analysis of Architectural Bottlenecks methodology Virtual prototyping for efficient multi-core ECU development of driver assistance systems Energy efficient stream-based configurable architecture for embedded platforms Predictable dynamic embedded data processing
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