具有关联堆栈和虚拟寻址能力的模块化小型机

L.E.M. Warburton, J. S. Martin, D. Edwards
{"title":"具有关联堆栈和虚拟寻址能力的模块化小型机","authors":"L.E.M. Warburton, J. S. Martin, D. Edwards","doi":"10.1049/IJ-CDT:19780004","DOIUrl":null,"url":null,"abstract":"The paper describes the design of a structured high-level-language minicomputer which is being designed and built at the University of Manchester. The design emphasis is on high performance and the machine incorporates a variable-length zero-address order code to provide a compact and efficient compiled code. The top elements of the stack are stored in a fast-access associative buffer which is also used to store frequently-used names and pointers. The buffer provides a powerful operand-accessing mechanism which overcomes most of the data-accessing and stack-organisational problems encountered by conventional stacking machines. A segmented virtual-address space is provided and the use of indirect orders enables this space to be extended to 24 bits, allowing large programs to be run. All address translation is performed by hardware to minimise overheads. Operating-system overheads are greatly reduced by storing frequently-used operands in the associative buffer and by providing hardware assistance for process changing and interrupt handling. Finally, flexibility and simplicity of design have been incorporated by adopting a modular approach and using a microprogram to implement the control at the block level.","PeriodicalId":344610,"journal":{"name":"Iee Journal on Computers and Digital Techniques","volume":"18 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"1978-02-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"1","resultStr":"{\"title\":\"Modular minicomputer with an associative stack and a virtual-addressing capability\",\"authors\":\"L.E.M. Warburton, J. S. Martin, D. Edwards\",\"doi\":\"10.1049/IJ-CDT:19780004\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"The paper describes the design of a structured high-level-language minicomputer which is being designed and built at the University of Manchester. The design emphasis is on high performance and the machine incorporates a variable-length zero-address order code to provide a compact and efficient compiled code. The top elements of the stack are stored in a fast-access associative buffer which is also used to store frequently-used names and pointers. The buffer provides a powerful operand-accessing mechanism which overcomes most of the data-accessing and stack-organisational problems encountered by conventional stacking machines. A segmented virtual-address space is provided and the use of indirect orders enables this space to be extended to 24 bits, allowing large programs to be run. All address translation is performed by hardware to minimise overheads. Operating-system overheads are greatly reduced by storing frequently-used operands in the associative buffer and by providing hardware assistance for process changing and interrupt handling. Finally, flexibility and simplicity of design have been incorporated by adopting a modular approach and using a microprogram to implement the control at the block level.\",\"PeriodicalId\":344610,\"journal\":{\"name\":\"Iee Journal on Computers and Digital Techniques\",\"volume\":\"18 1\",\"pages\":\"0\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"1978-02-01\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"1\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"Iee Journal on Computers and Digital Techniques\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1049/IJ-CDT:19780004\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"Iee Journal on Computers and Digital Techniques","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1049/IJ-CDT:19780004","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
引用次数: 1

摘要

本文描述了曼彻斯特大学正在设计和制造的一种结构化高级语言小型机的设计。设计的重点是高性能,机器结合了一个可变长度的零地址顺序代码,以提供一个紧凑和高效的编译代码。堆栈的顶部元素存储在快速访问关联缓冲区中,该缓冲区也用于存储经常使用的名称和指针。缓冲区提供了一个强大的操作访问机制,克服了传统堆栈机遇到的大多数数据访问和堆栈组织问题。提供了一个分段的虚拟地址空间,并且使用间接命令可以将该空间扩展到24位,从而允许运行大型程序。所有的地址转换都是由硬件执行的,以尽量减少开销。通过将经常使用的操作数存储在关联缓冲区中,并为进程更改和中断处理提供硬件帮助,可以大大减少操作系统开销。最后,通过采用模块化方法和使用微程序在块级实现控制,结合了设计的灵活性和简单性。
本文章由计算机程序翻译,如有差异,请以英文原文为准。
查看原文
分享 分享
微信好友 朋友圈 QQ好友 复制链接
本刊更多论文
Modular minicomputer with an associative stack and a virtual-addressing capability
The paper describes the design of a structured high-level-language minicomputer which is being designed and built at the University of Manchester. The design emphasis is on high performance and the machine incorporates a variable-length zero-address order code to provide a compact and efficient compiled code. The top elements of the stack are stored in a fast-access associative buffer which is also used to store frequently-used names and pointers. The buffer provides a powerful operand-accessing mechanism which overcomes most of the data-accessing and stack-organisational problems encountered by conventional stacking machines. A segmented virtual-address space is provided and the use of indirect orders enables this space to be extended to 24 bits, allowing large programs to be run. All address translation is performed by hardware to minimise overheads. Operating-system overheads are greatly reduced by storing frequently-used operands in the associative buffer and by providing hardware assistance for process changing and interrupt handling. Finally, flexibility and simplicity of design have been incorporated by adopting a modular approach and using a microprogram to implement the control at the block level.
求助全文
通过发布文献求助,成功后即可免费获取论文全文。 去求助
来源期刊
自引率
0.00%
发文量
0
期刊最新文献
Identification of multidimensional time series and its application in computer graphics 6th annual symposium on computer architecture Tabular method for evaluation of incomplete address decoding in microprocessor systems Segmentation of terrain images using textural and spectral characteristics 4th international conference on software engineering
×
引用
GB/T 7714-2015
复制
MLA
复制
APA
复制
导出至
BibTeX EndNote RefMan NoteFirst NoteExpress
×
×
提示
您的信息不完整,为了账户安全,请先补充。
现在去补充
×
提示
您因"违规操作"
具体请查看互助需知
我知道了
×
提示
现在去查看 取消
×
提示
确定
0
微信
客服QQ
Book学术公众号 扫码关注我们
反馈
×
意见反馈
请填写您的意见或建议
请填写您的手机或邮箱
已复制链接
已复制链接
快去分享给好友吧!
我知道了
×
扫码分享
扫码分享
Book学术官方微信
Book学术文献互助
Book学术文献互助群
群 号:481959085
Book学术
文献互助 智能选刊 最新文献 互助须知 联系我们:info@booksci.cn
Book学术提供免费学术资源搜索服务,方便国内外学者检索中英文文献。致力于提供最便捷和优质的服务体验。
Copyright © 2023 Book学术 All rights reserved.
ghs 京公网安备 11010802042870号 京ICP备2023020795号-1