MIMO-OFDM收发器的FPGA实现

K. Srinandhini, V. Vaithianathan
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引用次数: 7

摘要

正交频分复用(OFDM)是一种FDM调制方法,在视频流等高数据速率应用中是一种很有前途的方法。该方法对多径选频信道有效。多输入多输出(MIMO)是一种在收发端使用多个天线的无线技术。它增加了链路吞吐量和网络容量。MIMO和OFDM的结合提供了一个对由严重的多径散射和窄带干扰引起的频率选择性衰落具有鲁棒性的系统。这种持续的评估加速了片上系统(SoC)平台的发展,以支持这些技术的物理层。本文讨论了MIMO-OFDM信道编码器、信道解码器、信道交织器和信道去交织器的FPGA实现。由于复杂度较低,采用码率为1/2的卷积编码器,译码采用维特比解码器。利用交织器和去交织器消除了突发误差,提高了性能。
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FPGA implementation of MIMO-OFDM transceiver
Orthogonal Frequency Division Multiplexing (OFDM) which is a FDM modulation is a promising methodology for high data rate applications like video streaming. This methodology works effectively for multipath frequency selective channels. Multiple Input and Multiple Output (MIMO) is a wireless technology that uses multiple antennas at the transceiver ends. It increases link throughput and network capacity. The combination of both MIMO and OFDM provides a system that is robust against the frequency-selective fading caused by sever multi-path scattering and narrowband interference. This ongoing evaluation has accelerated the development of System-on-chip (SoC) platform to support the physical layer of these technologies. In this paper, Field Programmable Gate Array (FPGA) implementation of channel coder, its decoder, interleaver and deinterleaver of MIMO-OFDM are discussed. Convolutional encoder of code rate 1/2 is used because of its less complexity and Viterbi decoder is used for decoding. Interleaver and Deinterleaver is used to remove the burst error thus improving the performance.
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