{"title":"提高锁相环拉入能力的一种简单技术","authors":"K. Hiroshige","doi":"10.1109/TSET.1965.5009635","DOIUrl":null,"url":null,"abstract":"This paper presents a simple technique for improving the pull-in capability of phase-lock loops. This technique, called derived rate rejection or DRR, differs from those which use an external AFC loop in simplicity of implementation and design rationale, although the end result is the same. If, as is usually the case, a coherent detector accompanies the phase-lock loop, the implementation of the DRR technique requires only the addition of a switch. The switching logic results from a superficial consideration of the nonlinear equation for the phase-lock loop and its solution in the phase plane. The switch does not affect the normal behavior of the loop after lock has been attained. Results of computer studies show the improvement realizable for the following configurations: 1) Proportional-plus-integral control. 2) Proportional-plus-imperfect integral control. For an initial frequency error of five times the linearized phase lock-loop natural frequency, the improvement in pull-in time is a factor of two. For an initial frequency error of ten times the phase-lock loop natural frequency, the improvement in pull-in time is a factor of ten.","PeriodicalId":153922,"journal":{"name":"IEEE Transactions on Space Electronics and Telemetry","volume":"900 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"1965-03-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"7","resultStr":"{\"title\":\"A Simple Technique for Improving the Pull-in Capability of Phase-Lock Loops\",\"authors\":\"K. Hiroshige\",\"doi\":\"10.1109/TSET.1965.5009635\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"This paper presents a simple technique for improving the pull-in capability of phase-lock loops. This technique, called derived rate rejection or DRR, differs from those which use an external AFC loop in simplicity of implementation and design rationale, although the end result is the same. If, as is usually the case, a coherent detector accompanies the phase-lock loop, the implementation of the DRR technique requires only the addition of a switch. The switching logic results from a superficial consideration of the nonlinear equation for the phase-lock loop and its solution in the phase plane. The switch does not affect the normal behavior of the loop after lock has been attained. Results of computer studies show the improvement realizable for the following configurations: 1) Proportional-plus-integral control. 2) Proportional-plus-imperfect integral control. For an initial frequency error of five times the linearized phase lock-loop natural frequency, the improvement in pull-in time is a factor of two. For an initial frequency error of ten times the phase-lock loop natural frequency, the improvement in pull-in time is a factor of ten.\",\"PeriodicalId\":153922,\"journal\":{\"name\":\"IEEE Transactions on Space Electronics and Telemetry\",\"volume\":\"900 1\",\"pages\":\"0\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"1965-03-01\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"7\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"IEEE Transactions on Space Electronics and Telemetry\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1109/TSET.1965.5009635\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"IEEE Transactions on Space Electronics and Telemetry","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/TSET.1965.5009635","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
A Simple Technique for Improving the Pull-in Capability of Phase-Lock Loops
This paper presents a simple technique for improving the pull-in capability of phase-lock loops. This technique, called derived rate rejection or DRR, differs from those which use an external AFC loop in simplicity of implementation and design rationale, although the end result is the same. If, as is usually the case, a coherent detector accompanies the phase-lock loop, the implementation of the DRR technique requires only the addition of a switch. The switching logic results from a superficial consideration of the nonlinear equation for the phase-lock loop and its solution in the phase plane. The switch does not affect the normal behavior of the loop after lock has been attained. Results of computer studies show the improvement realizable for the following configurations: 1) Proportional-plus-integral control. 2) Proportional-plus-imperfect integral control. For an initial frequency error of five times the linearized phase lock-loop natural frequency, the improvement in pull-in time is a factor of two. For an initial frequency error of ten times the phase-lock loop natural frequency, the improvement in pull-in time is a factor of ten.