便携式系统的电压降低技术

Anan Tha Chandrakasan
{"title":"便携式系统的电压降低技术","authors":"Anan Tha Chandrakasan","doi":"10.1109/ASIC.1997.616967","DOIUrl":null,"url":null,"abstract":"Supply voltage scaling to 1 V and below is the key to low-power system design. Threshold voltage reduction enables aggressive supply scaling but increases leakage power. Emerging technologies such as MTCMOS and variable threshold bulk/SOI will be essential in controlling leakage while achieving high performance levels at low supply voltages. Power can also be reduced by adaptively varying the supply voltage in applications where the computational workload varies with time. Aggressive voltage and power level scaling requires efficient DC-DC conversion circuitry and in some cases, it is necessary to embed this function in the processor.","PeriodicalId":300310,"journal":{"name":"Proceedings. Tenth Annual IEEE International ASIC Conference and Exhibit (Cat. No.97TH8334)","volume":"54 5 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"1997-09-07","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"2","resultStr":"{\"title\":\"Voltage reduction techniques for portable systems\",\"authors\":\"Anan Tha Chandrakasan\",\"doi\":\"10.1109/ASIC.1997.616967\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"Supply voltage scaling to 1 V and below is the key to low-power system design. Threshold voltage reduction enables aggressive supply scaling but increases leakage power. Emerging technologies such as MTCMOS and variable threshold bulk/SOI will be essential in controlling leakage while achieving high performance levels at low supply voltages. Power can also be reduced by adaptively varying the supply voltage in applications where the computational workload varies with time. Aggressive voltage and power level scaling requires efficient DC-DC conversion circuitry and in some cases, it is necessary to embed this function in the processor.\",\"PeriodicalId\":300310,\"journal\":{\"name\":\"Proceedings. Tenth Annual IEEE International ASIC Conference and Exhibit (Cat. No.97TH8334)\",\"volume\":\"54 5 1\",\"pages\":\"0\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"1997-09-07\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"2\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"Proceedings. Tenth Annual IEEE International ASIC Conference and Exhibit (Cat. No.97TH8334)\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1109/ASIC.1997.616967\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"Proceedings. Tenth Annual IEEE International ASIC Conference and Exhibit (Cat. No.97TH8334)","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/ASIC.1997.616967","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
引用次数: 2

摘要

电源电压缩放到1 V及以下是低功耗系统设计的关键。阈值电压降低可以实现积极的电源缩放,但会增加泄漏功率。新兴技术,如MTCMOS和可变阈值体/SOI,对于控制泄漏,同时在低电源电压下实现高性能水平至关重要。在计算工作负载随时间变化的应用中,还可以通过自适应地改变电源电压来降低功耗。积极的电压和功率级缩放需要高效的DC-DC转换电路,在某些情况下,有必要将此功能嵌入处理器中。
本文章由计算机程序翻译,如有差异,请以英文原文为准。
查看原文
分享 分享
微信好友 朋友圈 QQ好友 复制链接
本刊更多论文
Voltage reduction techniques for portable systems
Supply voltage scaling to 1 V and below is the key to low-power system design. Threshold voltage reduction enables aggressive supply scaling but increases leakage power. Emerging technologies such as MTCMOS and variable threshold bulk/SOI will be essential in controlling leakage while achieving high performance levels at low supply voltages. Power can also be reduced by adaptively varying the supply voltage in applications where the computational workload varies with time. Aggressive voltage and power level scaling requires efficient DC-DC conversion circuitry and in some cases, it is necessary to embed this function in the processor.
求助全文
通过发布文献求助,成功后即可免费获取论文全文。 去求助
来源期刊
自引率
0.00%
发文量
0
期刊最新文献
Low power optimization of bit-serial digital filters Applying functional decomposition for depth minimal technology mapping of multiplexer based FPGAs Layout verification to improve ESD/latchup immunity of scaled-down CMOS cell libraries A MAGFET sensor array for digital magnetic signal reading Low voltage and low power design of microwave mixer
×
引用
GB/T 7714-2015
复制
MLA
复制
APA
复制
导出至
BibTeX EndNote RefMan NoteFirst NoteExpress
×
×
提示
您的信息不完整,为了账户安全,请先补充。
现在去补充
×
提示
您因"违规操作"
具体请查看互助需知
我知道了
×
提示
现在去查看 取消
×
提示
确定
0
微信
客服QQ
Book学术公众号 扫码关注我们
反馈
×
意见反馈
请填写您的意见或建议
请填写您的手机或邮箱
已复制链接
已复制链接
快去分享给好友吧!
我知道了
×
扫码分享
扫码分享
Book学术官方微信
Book学术文献互助
Book学术文献互助群
群 号:481959085
Book学术
文献互助 智能选刊 最新文献 互助须知 联系我们:info@booksci.cn
Book学术提供免费学术资源搜索服务,方便国内外学者检索中英文文献。致力于提供最便捷和优质的服务体验。
Copyright © 2023 Book学术 All rights reserved.
ghs 京公网安备 11010802042870号 京ICP备2023020795号-1