{"title":"减少开关数的新型混合多电平逆变器","authors":"L. K. Haw, Nur Atiqah Jefry, Wong Kiing Ing","doi":"10.1109/ICSET53708.2021.9612532","DOIUrl":null,"url":null,"abstract":"This paper extended the findings of the previously proposed multilevel inverter (MLI) topology to produce 51-level of AC output voltage waveform in hybrid configuration. The proposed topology is structured by merging the feature of Cascaded H-bridge Multilevel inverter (CHB-MLI) and the Diode Clamped Multilevel Inverter (DC-MLI). When compared with the previous work, this proposed topology utilized 1 additional DC voltage source plus 4 switches (i.e., making it a total of 23 components) to achieve the aforementioned outcome. With such great number of voltage level being generated, the proposed topology also meets the total harmonic distortion (THD) limit set by IEEE standard (i.e., 5%) across the selected ranges of modulation indexes (i.e., 0.3 to 1). Through the simulation conducted via Matlab/Simulink, the variations between the number of voltage level, THD, and its RMS voltage are being analyzed and thoroughly discussed. The comparison of the proposed topology against the recently presented topologies are also carried to strengthen its novelty.","PeriodicalId":433197,"journal":{"name":"2021 IEEE 11th International Conference on System Engineering and Technology (ICSET)","volume":"142 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2021-11-06","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"0","resultStr":"{\"title\":\"The New Hybrid Multilevel Inverter with Reduced Number of Switches\",\"authors\":\"L. K. Haw, Nur Atiqah Jefry, Wong Kiing Ing\",\"doi\":\"10.1109/ICSET53708.2021.9612532\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"This paper extended the findings of the previously proposed multilevel inverter (MLI) topology to produce 51-level of AC output voltage waveform in hybrid configuration. The proposed topology is structured by merging the feature of Cascaded H-bridge Multilevel inverter (CHB-MLI) and the Diode Clamped Multilevel Inverter (DC-MLI). When compared with the previous work, this proposed topology utilized 1 additional DC voltage source plus 4 switches (i.e., making it a total of 23 components) to achieve the aforementioned outcome. With such great number of voltage level being generated, the proposed topology also meets the total harmonic distortion (THD) limit set by IEEE standard (i.e., 5%) across the selected ranges of modulation indexes (i.e., 0.3 to 1). Through the simulation conducted via Matlab/Simulink, the variations between the number of voltage level, THD, and its RMS voltage are being analyzed and thoroughly discussed. The comparison of the proposed topology against the recently presented topologies are also carried to strengthen its novelty.\",\"PeriodicalId\":433197,\"journal\":{\"name\":\"2021 IEEE 11th International Conference on System Engineering and Technology (ICSET)\",\"volume\":\"142 1\",\"pages\":\"0\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"2021-11-06\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"0\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"2021 IEEE 11th International Conference on System Engineering and Technology (ICSET)\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1109/ICSET53708.2021.9612532\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"2021 IEEE 11th International Conference on System Engineering and Technology (ICSET)","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/ICSET53708.2021.9612532","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
The New Hybrid Multilevel Inverter with Reduced Number of Switches
This paper extended the findings of the previously proposed multilevel inverter (MLI) topology to produce 51-level of AC output voltage waveform in hybrid configuration. The proposed topology is structured by merging the feature of Cascaded H-bridge Multilevel inverter (CHB-MLI) and the Diode Clamped Multilevel Inverter (DC-MLI). When compared with the previous work, this proposed topology utilized 1 additional DC voltage source plus 4 switches (i.e., making it a total of 23 components) to achieve the aforementioned outcome. With such great number of voltage level being generated, the proposed topology also meets the total harmonic distortion (THD) limit set by IEEE standard (i.e., 5%) across the selected ranges of modulation indexes (i.e., 0.3 to 1). Through the simulation conducted via Matlab/Simulink, the variations between the number of voltage level, THD, and its RMS voltage are being analyzed and thoroughly discussed. The comparison of the proposed topology against the recently presented topologies are also carried to strengthen its novelty.