{"title":"基于FPGA的多端口寄存器文件的设计与实现","authors":"Li-hua Jiang, Ya-qin Li","doi":"10.1109/KAM.2010.5646298","DOIUrl":null,"url":null,"abstract":"In cpu design, the register file is a necessary device which save the instruction and data. In this paper, we propose a design method for multi-port register file design in the environment of single-cycle CPU system based on the MIPS instruction set and according to the characteristics of multi-port register file,and the VHDL langauge is introduced in order to speed up the development cycle. Furthermore, we discuss the consideration and operational principle of design and realization in detail.The simulation results for the part constructed by FPGA are also presented. In this example which provides the learning and design innovation for other circuit designed.","PeriodicalId":160788,"journal":{"name":"2010 Third International Symposium on Knowledge Acquisition and Modeling","volume":"197 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2010-11-29","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"1","resultStr":"{\"title\":\"Design and realization of multi-port register file based on FPGA\",\"authors\":\"Li-hua Jiang, Ya-qin Li\",\"doi\":\"10.1109/KAM.2010.5646298\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"In cpu design, the register file is a necessary device which save the instruction and data. In this paper, we propose a design method for multi-port register file design in the environment of single-cycle CPU system based on the MIPS instruction set and according to the characteristics of multi-port register file,and the VHDL langauge is introduced in order to speed up the development cycle. Furthermore, we discuss the consideration and operational principle of design and realization in detail.The simulation results for the part constructed by FPGA are also presented. In this example which provides the learning and design innovation for other circuit designed.\",\"PeriodicalId\":160788,\"journal\":{\"name\":\"2010 Third International Symposium on Knowledge Acquisition and Modeling\",\"volume\":\"197 1\",\"pages\":\"0\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"2010-11-29\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"1\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"2010 Third International Symposium on Knowledge Acquisition and Modeling\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1109/KAM.2010.5646298\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"2010 Third International Symposium on Knowledge Acquisition and Modeling","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/KAM.2010.5646298","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
Design and realization of multi-port register file based on FPGA
In cpu design, the register file is a necessary device which save the instruction and data. In this paper, we propose a design method for multi-port register file design in the environment of single-cycle CPU system based on the MIPS instruction set and according to the characteristics of multi-port register file,and the VHDL langauge is introduced in order to speed up the development cycle. Furthermore, we discuss the consideration and operational principle of design and realization in detail.The simulation results for the part constructed by FPGA are also presented. In this example which provides the learning and design innovation for other circuit designed.