{"title":"低压浮栅电流反射镜","authors":"Y. Berg, T. Lande, S. Naess","doi":"10.1109/ASIC.1997.616971","DOIUrl":null,"url":null,"abstract":"In this paper we propose a novel design of low-voltage current mirrors using floating gates. Floating gate UV-light programmable MOS transistors (FGUVMOS) are used to design current mirrors in low-voltage/low-power analog applications. The capacitive divider inputs to the floating gates can he utilized to reduce current mismatch due to Early effect.","PeriodicalId":300310,"journal":{"name":"Proceedings. Tenth Annual IEEE International ASIC Conference and Exhibit (Cat. No.97TH8334)","volume":"18 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"1997-09-07","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"24","resultStr":"{\"title\":\"Low-voltage floating-gate current mirrors\",\"authors\":\"Y. Berg, T. Lande, S. Naess\",\"doi\":\"10.1109/ASIC.1997.616971\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"In this paper we propose a novel design of low-voltage current mirrors using floating gates. Floating gate UV-light programmable MOS transistors (FGUVMOS) are used to design current mirrors in low-voltage/low-power analog applications. The capacitive divider inputs to the floating gates can he utilized to reduce current mismatch due to Early effect.\",\"PeriodicalId\":300310,\"journal\":{\"name\":\"Proceedings. Tenth Annual IEEE International ASIC Conference and Exhibit (Cat. No.97TH8334)\",\"volume\":\"18 1\",\"pages\":\"0\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"1997-09-07\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"24\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"Proceedings. Tenth Annual IEEE International ASIC Conference and Exhibit (Cat. No.97TH8334)\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1109/ASIC.1997.616971\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"Proceedings. Tenth Annual IEEE International ASIC Conference and Exhibit (Cat. No.97TH8334)","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/ASIC.1997.616971","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
In this paper we propose a novel design of low-voltage current mirrors using floating gates. Floating gate UV-light programmable MOS transistors (FGUVMOS) are used to design current mirrors in low-voltage/low-power analog applications. The capacitive divider inputs to the floating gates can he utilized to reduce current mismatch due to Early effect.
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