一种用于手机应用的新型电阻串DAC的设计

Fouad Farah, Mustapha El Alaoui, Karim El khadiri, H. Qjidaa, Ahmed Lakhassassi
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引用次数: 0

摘要

提出了一种基于130纳米CMOS技术的新型手机用电阻串数模转换器(DAC)的设计方案。采用高频率、高速度、高精度、低故障的电阻串结构设计了DAC,并对电阻串的选择采用了优化的去故障电路。该布局在CMOS 130nm中占据32.80um × 46.90um的小有源面积,功耗仅为361.574 uW,测量的积分非线性(INL)和差分非线性(DNL)分别为±0.00026LSB和±0.00034LSB。
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A design of a new resistor string DAC for phones applications in 130nm technology
This paper presents a design of a new resistor string digital-to-analog converter (DAC) in 130-nm CMOS technology for phones applications. The proposed DAC was designed with a resistor string architecture for high frequency, high speed, high accuracy and low glitches, optimized deglitch circuit is adopted for the selection of resistor string. The layout occupies a small active area of 32.80um × 46.90um in CMOS 130nm, the power consumption is only 361.574 uW, the measured integral nonlinearity (INL) and the measured differential nonlinearity (DNL) respectively are ±0.00026LSB and ± 0.00034LSB.
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