Fouad Farah, Mustapha El Alaoui, Karim El khadiri, H. Qjidaa, Ahmed Lakhassassi
{"title":"一种用于手机应用的新型电阻串DAC的设计","authors":"Fouad Farah, Mustapha El Alaoui, Karim El khadiri, H. Qjidaa, Ahmed Lakhassassi","doi":"10.1109/ISACV.2018.8354063","DOIUrl":null,"url":null,"abstract":"This paper presents a design of a new resistor string digital-to-analog converter (DAC) in 130-nm CMOS technology for phones applications. The proposed DAC was designed with a resistor string architecture for high frequency, high speed, high accuracy and low glitches, optimized deglitch circuit is adopted for the selection of resistor string. The layout occupies a small active area of 32.80um × 46.90um in CMOS 130nm, the power consumption is only 361.574 uW, the measured integral nonlinearity (INL) and the measured differential nonlinearity (DNL) respectively are ±0.00026LSB and ± 0.00034LSB.","PeriodicalId":184662,"journal":{"name":"2018 International Conference on Intelligent Systems and Computer Vision (ISCV)","volume":"91 1 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2018-04-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"0","resultStr":"{\"title\":\"A design of a new resistor string DAC for phones applications in 130nm technology\",\"authors\":\"Fouad Farah, Mustapha El Alaoui, Karim El khadiri, H. Qjidaa, Ahmed Lakhassassi\",\"doi\":\"10.1109/ISACV.2018.8354063\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"This paper presents a design of a new resistor string digital-to-analog converter (DAC) in 130-nm CMOS technology for phones applications. The proposed DAC was designed with a resistor string architecture for high frequency, high speed, high accuracy and low glitches, optimized deglitch circuit is adopted for the selection of resistor string. The layout occupies a small active area of 32.80um × 46.90um in CMOS 130nm, the power consumption is only 361.574 uW, the measured integral nonlinearity (INL) and the measured differential nonlinearity (DNL) respectively are ±0.00026LSB and ± 0.00034LSB.\",\"PeriodicalId\":184662,\"journal\":{\"name\":\"2018 International Conference on Intelligent Systems and Computer Vision (ISCV)\",\"volume\":\"91 1 1\",\"pages\":\"0\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"2018-04-01\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"0\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"2018 International Conference on Intelligent Systems and Computer Vision (ISCV)\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1109/ISACV.2018.8354063\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"2018 International Conference on Intelligent Systems and Computer Vision (ISCV)","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/ISACV.2018.8354063","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
A design of a new resistor string DAC for phones applications in 130nm technology
This paper presents a design of a new resistor string digital-to-analog converter (DAC) in 130-nm CMOS technology for phones applications. The proposed DAC was designed with a resistor string architecture for high frequency, high speed, high accuracy and low glitches, optimized deglitch circuit is adopted for the selection of resistor string. The layout occupies a small active area of 32.80um × 46.90um in CMOS 130nm, the power consumption is only 361.574 uW, the measured integral nonlinearity (INL) and the measured differential nonlinearity (DNL) respectively are ±0.00026LSB and ± 0.00034LSB.