用于高线性dac的MOST-Only R-2R梯形结构

D. Karadimas, M. Papamichail, K. Efstathiou
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引用次数: 5

摘要

本文提出了一种基于R-2R梯形拓扑的MOST-Only数字校准DAC架构。所提出的DAC架构采用的电路能够对DAC输出端的每个位silas电流贡献进行微调,从而得出一个高线性DAC架构。详细讨论了所提出的DAC的结构,并通过仿真结果证实了其高线性性能。所提出的DAC拓扑结构在速度和功耗方面保持了传统阶梯结构的性能,而不需要大面积的实现空间。
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A MOST-Only R-2R ladder-based architecture for high linearity DACs
The paper presents a MOST-Only, digitally calibrated DAC architecture, based on the R-2R ladder topology. The proposed DAC architecture employs circuitry that enables the fine trimming of each bitpsilas current contribution at the DACpsilas output, thus concluding in a high linear DAC architecture. The architecture of the proposed DAC is discussed in details along with simulation results that confirm its high linearity performance. The proposed DAC topology maintains the conventional ladderpsilas performance in speed and power dissipation without requiring large area for its implementation.
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