An Optimum Cascode Topology for High Gain Micro/Millimeter Wave CMOS Amplifier Design

An optimum gate-loaded cascode topology for maximizing the gain of a stable CMOS amplifier in micro/millimeter wave band is presented. By adding a piece of transmission line in the gate of cascode transistor, choosing an appropriate matching circuit that includes biasing, and exploiting the proper transmission line structure the gain per stage of CMOS amplifier can be increased and an optimum design can be achieved. Based on this topology a 28 GHz amplifier in 0.18 mum CMOS technology has been designed and fabricated. Gain of about 16 dB was measured for a two-stage cascode at 28 GHz in a 0.18 mum CMOS technology.