130 nm CMOS技术下提高读写余量的6T和8T SRAM单元的比较研究

Ram Murti Rawat, Vinod Kumar
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引用次数: 4

摘要

本文研究了影响静态随机存取存储器静态噪声裕度(SNM)的因素,重点研究了采用双节点电压摆幅恢复优化8T SRAM单元的读写操作,使其优于6T SRAM单元。减少读写时间,提高稳定性。需要新的8T SRAM技术在电路或架构层面。本文利用Cadence Virtuoso原理图工具对130nm工艺下具有改进读写余量的6T和8T SRAM单元进行了比较分析。
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A Comparative Study of 6T and 8T SRAM Cell With Improved Read and Write Margins in 130 nm CMOS Technology
This paper examines the factors that affect the Static Noise Margin (SNM) of a Static Random Access memories which focus on optimizing Read and Write operation of 8T SRAM cell which is better than 6T SRAM cell Using Swing Restoration for Dual Node Voltage. The read and Write time and improve Stability. New 8T SRAM technique on the circuit or architecture level is required. In this paper Comparative Analysis of 6T and 8T SRAM Cells with Improved Read and Write Margin is done for 130 nm Technology with Cadence Virtuoso schematics Tool.
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