A survey paper on modern technologies in fixed-width multiplier

The vital element of the DSP processor is Multiplier unit. The main objectives of the DSP processor are speed, power, delay and area. These goals have been realized with fixed-width multiplier whose output bits equal to input bits. The fixed-width multiplier implemented DSP processors can be applied for audio signal processing, video signal processing, VLSI signal processing, speech recognition, digital communication, medical imaging, MRI, MP3 and so on. Many researchers are optimizing, the performance of the multiplication process. In this review paper, the technologies to achieve the objectives of the DSP processor have been studied. And also the most recent developments in the multiplier circuit have been discussed. In this paper, first, the brief background of the fixed-width multiplier is outlined. Then, several multiplier architectures proposed for MAC (multiplier-accumulator) presented, narrating their functioning principles and key features. To provide a perception into future research directions, open research issues are discussed at the completion of this paper.