用于缩小CMOS和MTCMOS技术的高速动态逻辑样式

ISLPED'00: Proceedings of the 2000 International Symposium on Low Power Electronics and Design (Cat. No.00TH8514) Pub Date : 2000-08-01 DOI:10.1145/344166.344562

M. Allam, M. Anis, M. Elmasry

{"title":"用于缩小CMOS和MTCMOS技术的高速动态逻辑样式","authors":"M. Allam, M. Anis, M. Elmasry","doi":"10.1145/344166.344562","DOIUrl":null,"url":null,"abstract":"A new high-speed domino circuit, called HS-Domino is developed. HS-Domino resolves the trade-off between performance and noise margins in conventional CD-Domino logic while dissipating low dynamic power with minimal area overhead. A dual-threshold (MTCMOS) implementation of HS-Domino and DDCVS logic is also devised. This implementation achieves low leakage values during standby, while maintaining high performance and low dynamic power during the active mode.","PeriodicalId":188020,"journal":{"name":"ISLPED'00: Proceedings of the 2000 International Symposium on Low Power Electronics and Design (Cat. No.00TH8514)","volume":"13 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2000-08-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"129","resultStr":"{\"title\":\"High-speed dynamic logic styles for scaled-down CMOS and MTCMOS technologies\",\"authors\":\"M. Allam, M. Anis, M. Elmasry\",\"doi\":\"10.1145/344166.344562\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"A new high-speed domino circuit, called HS-Domino is developed. HS-Domino resolves the trade-off between performance and noise margins in conventional CD-Domino logic while dissipating low dynamic power with minimal area overhead. A dual-threshold (MTCMOS) implementation of HS-Domino and DDCVS logic is also devised. This implementation achieves low leakage values during standby, while maintaining high performance and low dynamic power during the active mode.\",\"PeriodicalId\":188020,\"journal\":{\"name\":\"ISLPED'00: Proceedings of the 2000 International Symposium on Low Power Electronics and Design (Cat. No.00TH8514)\",\"volume\":\"13 1\",\"pages\":\"0\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"2000-08-01\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"129\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"ISLPED'00: Proceedings of the 2000 International Symposium on Low Power Electronics and Design (Cat. No.00TH8514)\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1145/344166.344562\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"ISLPED'00: Proceedings of the 2000 International Symposium on Low Power Electronics and Design (Cat. No.00TH8514)","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1145/344166.344562","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}

引用次数: 129

摘要

开发了一种新的高速多米诺电路，称为HS-Domino。HS-Domino解决了传统CD-Domino逻辑中性能和噪声裕度之间的权衡，同时以最小的面积开销消耗低动态功率。还设计了HS-Domino和DDCVS逻辑的双阈值(MTCMOS)实现。这种实现在待机时实现低泄漏值，同时在活动模式下保持高性能和低动态功率。

本文章由计算机程序翻译，如有差异，请以英文原文为准。

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High-speed dynamic logic styles for scaled-down CMOS and MTCMOS technologies

A new high-speed domino circuit, called HS-Domino is developed. HS-Domino resolves the trade-off between performance and noise margins in conventional CD-Domino logic while dissipating low dynamic power with minimal area overhead. A dual-threshold (MTCMOS) implementation of HS-Domino and DDCVS logic is also devised. This implementation achieves low leakage values during standby, while maintaining high performance and low dynamic power during the active mode.

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ISLPED'00: Proceedings of the 2000 International Symposium on Low Power Electronics and Design (Cat. No.00TH8514)

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