P. Shah, G. Pollack, G. Varnell, C. Rhodes, D. Kang, W. Bruncke
{"title":"采用直接电子束光刻技术制备的22ns 4k位SRAM","authors":"P. Shah, G. Pollack, G. Varnell, C. Rhodes, D. Kang, W. Bruncke","doi":"10.1109/IEDM.1980.189952","DOIUrl":null,"url":null,"abstract":"A 22 ns scaled 4K-bit static RAM (SRAM) has been fabricated on a 12K mil2chip demonstrating high density electron beam direct slice writing lithography and dry etch processes. This 2 µm design rule, LSI vehicle used a vector-scanned electron-beam exposure system with a capability of 2 µm feature definition, 0.25 µm level-to-level registration, and auto chip-by-chip alignment. High speed, high resolution positive and negative electron-beam resists were used for all patterning steps. All implanted scaled MOS process with dry etching techniques for Si, SiO2, and Si3N4were used to realize 22ns access time 4KSRAM at full temperature. A gate delay of 0.18ns and a speed power product of 0.08 pJ were realized on a 1 µm channel ring oscillator with this process.","PeriodicalId":180541,"journal":{"name":"1980 International Electron Devices Meeting","volume":"47 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"1900-01-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"1","resultStr":"{\"title\":\"A 22ns 4K-bit SRAM fabricated with direct electron beam lithography\",\"authors\":\"P. Shah, G. Pollack, G. Varnell, C. Rhodes, D. Kang, W. Bruncke\",\"doi\":\"10.1109/IEDM.1980.189952\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"A 22 ns scaled 4K-bit static RAM (SRAM) has been fabricated on a 12K mil2chip demonstrating high density electron beam direct slice writing lithography and dry etch processes. This 2 µm design rule, LSI vehicle used a vector-scanned electron-beam exposure system with a capability of 2 µm feature definition, 0.25 µm level-to-level registration, and auto chip-by-chip alignment. High speed, high resolution positive and negative electron-beam resists were used for all patterning steps. All implanted scaled MOS process with dry etching techniques for Si, SiO2, and Si3N4were used to realize 22ns access time 4KSRAM at full temperature. A gate delay of 0.18ns and a speed power product of 0.08 pJ were realized on a 1 µm channel ring oscillator with this process.\",\"PeriodicalId\":180541,\"journal\":{\"name\":\"1980 International Electron Devices Meeting\",\"volume\":\"47 1\",\"pages\":\"0\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"1900-01-01\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"1\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"1980 International Electron Devices Meeting\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1109/IEDM.1980.189952\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"1980 International Electron Devices Meeting","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/IEDM.1980.189952","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
A 22ns 4K-bit SRAM fabricated with direct electron beam lithography
A 22 ns scaled 4K-bit static RAM (SRAM) has been fabricated on a 12K mil2chip demonstrating high density electron beam direct slice writing lithography and dry etch processes. This 2 µm design rule, LSI vehicle used a vector-scanned electron-beam exposure system with a capability of 2 µm feature definition, 0.25 µm level-to-level registration, and auto chip-by-chip alignment. High speed, high resolution positive and negative electron-beam resists were used for all patterning steps. All implanted scaled MOS process with dry etching techniques for Si, SiO2, and Si3N4were used to realize 22ns access time 4KSRAM at full temperature. A gate delay of 0.18ns and a speed power product of 0.08 pJ were realized on a 1 µm channel ring oscillator with this process.