{"title":"CMOS逆变器驱动耦合RLC互连串扰噪声分析的新方法","authors":"C. Paidimarry, B. P. Kumar, S. Katkoori","doi":"10.1109/INDCON.2013.6726011","DOIUrl":null,"url":null,"abstract":"The performance of modern integrated circuits is significantly influenced by coupling effects of interconnects. Crosstalk noise must therefore be analyzed in the early stage of design to develop reliable VLSI interconnects. In this paper, we present a closed form crosstalk noise estimation technique to coupled RLC interconnects based on coupled transmission line theory and Fourier series analysis. The salient features of our model include accuracy, computational efficiency and continuous time domain solution. We analyze the impact of finite resistance in coupled RLC interconnects. The nonlinear behavior of the driver (CMOS inverter) is captured well in the proposed model. We introduce a novel technique to model CMOS inverter, namely MRLM (Multiple Ramp Library Model). It replaces the nonlinear driver into its equivalent RC model. The resultant circuit resembles with the simple coupled RLC interconnect in the absence of inverters and hence the same analysis is extended after the replacement. Based on our continuous time defined models, we derive analytical models for delay and energy dissipation due to interconnect. In addition, this work emphasizes on improving the performance namely computational efficiency. Simulations of our analytical models and SPICE are demonstrated by assuming different sets of line parameters. It is shown from the numerical results that our estimates match closely with that of SPICE simulations at a mean estimation error of 2.25 percentage.","PeriodicalId":313185,"journal":{"name":"2013 Annual IEEE India Conference (INDICON)","volume":"30 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2013-12-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"1","resultStr":"{\"title\":\"A novel approach to crosstalk noise analysis in CMOS inverter driven coupled RLC interconnects\",\"authors\":\"C. Paidimarry, B. P. Kumar, S. Katkoori\",\"doi\":\"10.1109/INDCON.2013.6726011\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"The performance of modern integrated circuits is significantly influenced by coupling effects of interconnects. Crosstalk noise must therefore be analyzed in the early stage of design to develop reliable VLSI interconnects. In this paper, we present a closed form crosstalk noise estimation technique to coupled RLC interconnects based on coupled transmission line theory and Fourier series analysis. The salient features of our model include accuracy, computational efficiency and continuous time domain solution. We analyze the impact of finite resistance in coupled RLC interconnects. The nonlinear behavior of the driver (CMOS inverter) is captured well in the proposed model. We introduce a novel technique to model CMOS inverter, namely MRLM (Multiple Ramp Library Model). It replaces the nonlinear driver into its equivalent RC model. The resultant circuit resembles with the simple coupled RLC interconnect in the absence of inverters and hence the same analysis is extended after the replacement. Based on our continuous time defined models, we derive analytical models for delay and energy dissipation due to interconnect. In addition, this work emphasizes on improving the performance namely computational efficiency. Simulations of our analytical models and SPICE are demonstrated by assuming different sets of line parameters. It is shown from the numerical results that our estimates match closely with that of SPICE simulations at a mean estimation error of 2.25 percentage.\",\"PeriodicalId\":313185,\"journal\":{\"name\":\"2013 Annual IEEE India Conference (INDICON)\",\"volume\":\"30 1\",\"pages\":\"0\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"2013-12-01\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"1\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"2013 Annual IEEE India Conference (INDICON)\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1109/INDCON.2013.6726011\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"2013 Annual IEEE India Conference (INDICON)","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/INDCON.2013.6726011","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
A novel approach to crosstalk noise analysis in CMOS inverter driven coupled RLC interconnects
The performance of modern integrated circuits is significantly influenced by coupling effects of interconnects. Crosstalk noise must therefore be analyzed in the early stage of design to develop reliable VLSI interconnects. In this paper, we present a closed form crosstalk noise estimation technique to coupled RLC interconnects based on coupled transmission line theory and Fourier series analysis. The salient features of our model include accuracy, computational efficiency and continuous time domain solution. We analyze the impact of finite resistance in coupled RLC interconnects. The nonlinear behavior of the driver (CMOS inverter) is captured well in the proposed model. We introduce a novel technique to model CMOS inverter, namely MRLM (Multiple Ramp Library Model). It replaces the nonlinear driver into its equivalent RC model. The resultant circuit resembles with the simple coupled RLC interconnect in the absence of inverters and hence the same analysis is extended after the replacement. Based on our continuous time defined models, we derive analytical models for delay and energy dissipation due to interconnect. In addition, this work emphasizes on improving the performance namely computational efficiency. Simulations of our analytical models and SPICE are demonstrated by assuming different sets of line parameters. It is shown from the numerical results that our estimates match closely with that of SPICE simulations at a mean estimation error of 2.25 percentage.