Reconfigurable Rounding based Approximate Multiplier for Floating Point Numbers

Most of all computations carried out by these DSP cores are contributed by the arithmetic units, particularly multipliers. For the creation of energy-effectual digital signal processing cores, a high economical and low power design is also a crucial necessity. The DSP processors in portable devices run multimedia programs and produces image and video outputs for human consumption. Because human vision is limited, an approximate architecture can be employed to achieve excellent energy consumption with minimal performance loss. The theme is to design a reconfigurable ROBA multiplier by using floating numbers as an input. The architectural (circuit and logic levels) and algorithmic of ROBA multiplier can used to approximate values within arithmetic units. As a result, researchers in the subject of approximation computing have focused particularly on developing approximate arithmetic units, ROBA multiplier offers a superior trade-off between power, performance, and computational error. The design is stimulated by Xilinix Vivado software.