{"title":"具有前馈纹波消除的高电源抑制LDO","authors":"Zhichao Lu, Shengming Huang, Q. Duan","doi":"10.1117/12.2639114","DOIUrl":null,"url":null,"abstract":"In this design, a 0.35um BCD process is used to design a high power supply rejection ratio LDO with feed-forward ripple elimination. By analyzing the power supply noise interference, a feed-forward ripple elimination circuit is used to reduce the power supply noise on the output. In order to ensure that the LDO has a high power supply rejection ratio in a wide load range, the output voltage of the LDO is 1.8V, the input voltage range is 2.5V to 5V, the load current range is 0 to 20mA, and the quiescent current is less than 80μA. The simulation results show that when the input voltage is 5V, the PSRR at low frequency at no load is 114dB, and the PSRR at 10 kHz is 77dB; when the load is 20mA, the PSRR at low frequency is 104dB, and the PSRR at 10 kHz is 72dB.","PeriodicalId":336892,"journal":{"name":"Neural Networks, Information and Communication Engineering","volume":"71 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2022-06-30","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"0","resultStr":"{\"title\":\"A high power supply rejection LDO with feed-forward ripple cancellation\",\"authors\":\"Zhichao Lu, Shengming Huang, Q. Duan\",\"doi\":\"10.1117/12.2639114\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"In this design, a 0.35um BCD process is used to design a high power supply rejection ratio LDO with feed-forward ripple elimination. By analyzing the power supply noise interference, a feed-forward ripple elimination circuit is used to reduce the power supply noise on the output. In order to ensure that the LDO has a high power supply rejection ratio in a wide load range, the output voltage of the LDO is 1.8V, the input voltage range is 2.5V to 5V, the load current range is 0 to 20mA, and the quiescent current is less than 80μA. The simulation results show that when the input voltage is 5V, the PSRR at low frequency at no load is 114dB, and the PSRR at 10 kHz is 77dB; when the load is 20mA, the PSRR at low frequency is 104dB, and the PSRR at 10 kHz is 72dB.\",\"PeriodicalId\":336892,\"journal\":{\"name\":\"Neural Networks, Information and Communication Engineering\",\"volume\":\"71 1\",\"pages\":\"0\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"2022-06-30\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"0\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"Neural Networks, Information and Communication Engineering\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1117/12.2639114\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"Neural Networks, Information and Communication Engineering","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1117/12.2639114","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
A high power supply rejection LDO with feed-forward ripple cancellation
In this design, a 0.35um BCD process is used to design a high power supply rejection ratio LDO with feed-forward ripple elimination. By analyzing the power supply noise interference, a feed-forward ripple elimination circuit is used to reduce the power supply noise on the output. In order to ensure that the LDO has a high power supply rejection ratio in a wide load range, the output voltage of the LDO is 1.8V, the input voltage range is 2.5V to 5V, the load current range is 0 to 20mA, and the quiescent current is less than 80μA. The simulation results show that when the input voltage is 5V, the PSRR at low frequency at no load is 114dB, and the PSRR at 10 kHz is 77dB; when the load is 20mA, the PSRR at low frequency is 104dB, and the PSRR at 10 kHz is 72dB.
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