用fpga生成3、9和21级的多级SPWM技术

2013 North American Power Symposium (NAPS) Pub Date : 2013-11-25 DOI:10.1109/NAPS.2013.6666843

N. M. Salgado‐Herrera, A. Medina-Rios, A. Ramos-Paz, J. R. Rodríguez-Rodríguez

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引用次数: 5

摘要

本文讨论了通过可编程门阵列(Field programmable gate arrays, fpga)实现并行处理SPWM多电平技术。结果表明，功率变换器中的开关损耗随着SPWM信号中电平数的增加而显著降低，从而提供了有效的能量传输。通过Xilinx Spartan系列FPGA在VHDL中实现了3、9和21级的多电平SPWM控制响应。

本文章由计算机程序翻译，如有差异，请以英文原文为准。

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Generation of a multilevel SPWM technique of 3, 9 and 21 levels with FPGAs

This paper deals with the implementation of parallel processing SPWM multilevel techniques through programmable gate arrays (Field Programmable Gate Arrays, FPGAs). It is shown that switching losses in power converters significantly decreases with an increased number of levels in the SPWM signal, thus providing an efficient energy transfer. The multilevel SPWM control response of 3, 9 and 21 levels in VHDL through the FPGA Xilinx Spartan family is illustrated.

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2013 North American Power Symposium (NAPS)

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