{"title":"逆忆阻器仿真器主动实现","authors":"Haneen G. Hezayyin, Nariman A. Khalil, A. Madian","doi":"10.1109/NILES50944.2020.9257961","DOIUrl":null,"url":null,"abstract":"The paper aims to propose three different inverse memristor emulators based on serveral active blocks. One of the presented emulator realizes employing second generation current conveyor (CCII) andcanalog voltage multiplier with passive elements. The other two introduced emulators are designed using cureent feedback operational amplifier (CFOA) with two switches or two BJT transistor. One of the proposed emulators has the advantages that it switches between the inverse and memristor at the same time but in different frequency with less number of components. The introduced circuitry are simulated to validate the concept of inverse memristor showing the pinched hysteresis loop in the I-V plane. Selected emulator is verified experimentally. A comparison of the three proposed emulators is presented to highlight the number ofcactive, passive components, and the range of frequency.","PeriodicalId":253090,"journal":{"name":"2020 2nd Novel Intelligent and Leading Emerging Sciences Conference (NILES)","volume":null,"pages":null},"PeriodicalIF":0.0000,"publicationDate":"2020-10-24","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"3","resultStr":"{\"title\":\"Inverse memrsitor emulator active Realizations\",\"authors\":\"Haneen G. Hezayyin, Nariman A. Khalil, A. Madian\",\"doi\":\"10.1109/NILES50944.2020.9257961\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"The paper aims to propose three different inverse memristor emulators based on serveral active blocks. One of the presented emulator realizes employing second generation current conveyor (CCII) andcanalog voltage multiplier with passive elements. The other two introduced emulators are designed using cureent feedback operational amplifier (CFOA) with two switches or two BJT transistor. One of the proposed emulators has the advantages that it switches between the inverse and memristor at the same time but in different frequency with less number of components. The introduced circuitry are simulated to validate the concept of inverse memristor showing the pinched hysteresis loop in the I-V plane. Selected emulator is verified experimentally. A comparison of the three proposed emulators is presented to highlight the number ofcactive, passive components, and the range of frequency.\",\"PeriodicalId\":253090,\"journal\":{\"name\":\"2020 2nd Novel Intelligent and Leading Emerging Sciences Conference (NILES)\",\"volume\":null,\"pages\":null},\"PeriodicalIF\":0.0000,\"publicationDate\":\"2020-10-24\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"3\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"2020 2nd Novel Intelligent and Leading Emerging Sciences Conference (NILES)\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1109/NILES50944.2020.9257961\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"2020 2nd Novel Intelligent and Leading Emerging Sciences Conference (NILES)","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/NILES50944.2020.9257961","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
The paper aims to propose three different inverse memristor emulators based on serveral active blocks. One of the presented emulator realizes employing second generation current conveyor (CCII) andcanalog voltage multiplier with passive elements. The other two introduced emulators are designed using cureent feedback operational amplifier (CFOA) with two switches or two BJT transistor. One of the proposed emulators has the advantages that it switches between the inverse and memristor at the same time but in different frequency with less number of components. The introduced circuitry are simulated to validate the concept of inverse memristor showing the pinched hysteresis loop in the I-V plane. Selected emulator is verified experimentally. A comparison of the three proposed emulators is presented to highlight the number ofcactive, passive components, and the range of frequency.
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