R. Feger, E. Kolmhofer, F. Starzer, Friedrich Wiesinger, S. Scheiblhofer, A. Stelzer
{"title":"一种带偏置锁相环稳频外差77 ghz FMCW雷达","authors":"R. Feger, E. Kolmhofer, F. Starzer, Friedrich Wiesinger, S. Scheiblhofer, A. Stelzer","doi":"10.1109/WISNET.2011.5725023","DOIUrl":null,"url":null,"abstract":"This contribution describes the realization of a heterodyne frequency-modulated continuous-wave (FMCW) radar system operating in the frequency band from 76 GHz to 77 GHz. To implement the heterodyne principle two voltage controlled oscillators (VCOs) are operated in order to produce frequency ramp signals with a fixed frequency offset. This allows to mitigate effects occurring in homodyne systems like, e.g., DC-offsets or low-frequency noise components. To avoid large divider values in the control loop the presented system is based on an offset phase-locked-loop configuration. In the presented implementation the same downconverter is used to implement the offset-loop for both VCOs, which has the positive effect that errors and noise influences in the downconversion process—at least partly—cancel out in the final FMCW output signal.","PeriodicalId":128026,"journal":{"name":"2011 IEEE Topical Conference on Wireless Sensors and Sensor Networks","volume":"38 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2011-03-07","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"11","resultStr":"{\"title\":\"A heterodyne 77-GHz FMCW radar with offset PLL frequency stabilization\",\"authors\":\"R. Feger, E. Kolmhofer, F. Starzer, Friedrich Wiesinger, S. Scheiblhofer, A. Stelzer\",\"doi\":\"10.1109/WISNET.2011.5725023\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"This contribution describes the realization of a heterodyne frequency-modulated continuous-wave (FMCW) radar system operating in the frequency band from 76 GHz to 77 GHz. To implement the heterodyne principle two voltage controlled oscillators (VCOs) are operated in order to produce frequency ramp signals with a fixed frequency offset. This allows to mitigate effects occurring in homodyne systems like, e.g., DC-offsets or low-frequency noise components. To avoid large divider values in the control loop the presented system is based on an offset phase-locked-loop configuration. In the presented implementation the same downconverter is used to implement the offset-loop for both VCOs, which has the positive effect that errors and noise influences in the downconversion process—at least partly—cancel out in the final FMCW output signal.\",\"PeriodicalId\":128026,\"journal\":{\"name\":\"2011 IEEE Topical Conference on Wireless Sensors and Sensor Networks\",\"volume\":\"38 1\",\"pages\":\"0\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"2011-03-07\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"11\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"2011 IEEE Topical Conference on Wireless Sensors and Sensor Networks\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1109/WISNET.2011.5725023\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"2011 IEEE Topical Conference on Wireless Sensors and Sensor Networks","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/WISNET.2011.5725023","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
A heterodyne 77-GHz FMCW radar with offset PLL frequency stabilization
This contribution describes the realization of a heterodyne frequency-modulated continuous-wave (FMCW) radar system operating in the frequency band from 76 GHz to 77 GHz. To implement the heterodyne principle two voltage controlled oscillators (VCOs) are operated in order to produce frequency ramp signals with a fixed frequency offset. This allows to mitigate effects occurring in homodyne systems like, e.g., DC-offsets or low-frequency noise components. To avoid large divider values in the control loop the presented system is based on an offset phase-locked-loop configuration. In the presented implementation the same downconverter is used to implement the offset-loop for both VCOs, which has the positive effect that errors and noise influences in the downconversion process—at least partly—cancel out in the final FMCW output signal.