{"title":"递归块结构数据压缩","authors":"M. Tilgner, M. Ishida, T. Yamaguchi","doi":"10.1109/DCC.1997.582139","DOIUrl":null,"url":null,"abstract":"Summary form only given. A simple algorithm for efficient lossless compression of circuit test data with fast decompression speed is presented. It can easily be converted into a VLSI implementation. The algorithm is based on recursive block structured run-length coding and compresses at ratios of about 6:1 to 1000:1, higher than most of the widely known compression techniques.","PeriodicalId":403990,"journal":{"name":"Proceedings DCC '97. Data Compression Conference","volume":"2 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"1997-03-25","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"4","resultStr":"{\"title\":\"Recursive block structured data compression\",\"authors\":\"M. Tilgner, M. Ishida, T. Yamaguchi\",\"doi\":\"10.1109/DCC.1997.582139\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"Summary form only given. A simple algorithm for efficient lossless compression of circuit test data with fast decompression speed is presented. It can easily be converted into a VLSI implementation. The algorithm is based on recursive block structured run-length coding and compresses at ratios of about 6:1 to 1000:1, higher than most of the widely known compression techniques.\",\"PeriodicalId\":403990,\"journal\":{\"name\":\"Proceedings DCC '97. Data Compression Conference\",\"volume\":\"2 1\",\"pages\":\"0\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"1997-03-25\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"4\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"Proceedings DCC '97. Data Compression Conference\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1109/DCC.1997.582139\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"Proceedings DCC '97. Data Compression Conference","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/DCC.1997.582139","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
Summary form only given. A simple algorithm for efficient lossless compression of circuit test data with fast decompression speed is presented. It can easily be converted into a VLSI implementation. The algorithm is based on recursive block structured run-length coding and compresses at ratios of about 6:1 to 1000:1, higher than most of the widely known compression techniques.