{"title":"一种新的SERDES发射机电源抖动灵敏度拉普拉斯变换模型","authors":"Michael Chang","doi":"10.1109/ICICM50929.2020.9292306","DOIUrl":null,"url":null,"abstract":"This paper provides supply-induced jitter-aware sensitivity and systematic modeling approach for analyzing supply noise induced timing jitter in high-speed I/O interfaces with using the Laplace transform method to perform the jitter generated by the supply noise in the time domain compared to present general analysis methods. One of the proposed models is the supply induced jitter transfer function. The proposed methodology provides an appropriate level of correlation and efficient method on high speed interface at system level the approach captures the interaction of the blocks through the regulators and the power distribution network (PDN). The goal is to provide sufficient performance for efficient system solutions in the early stages of design and achieve success at the system level.","PeriodicalId":364285,"journal":{"name":"2020 IEEE 5th International Conference on Integrated Circuits and Microsystems (ICICM)","volume":"245 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2020-10-23","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"0","resultStr":"{\"title\":\"A Novel Laplace Transform Modeling for Supply Induced Jitter Sensitivity of SERDES Transmitter\",\"authors\":\"Michael Chang\",\"doi\":\"10.1109/ICICM50929.2020.9292306\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"This paper provides supply-induced jitter-aware sensitivity and systematic modeling approach for analyzing supply noise induced timing jitter in high-speed I/O interfaces with using the Laplace transform method to perform the jitter generated by the supply noise in the time domain compared to present general analysis methods. One of the proposed models is the supply induced jitter transfer function. The proposed methodology provides an appropriate level of correlation and efficient method on high speed interface at system level the approach captures the interaction of the blocks through the regulators and the power distribution network (PDN). The goal is to provide sufficient performance for efficient system solutions in the early stages of design and achieve success at the system level.\",\"PeriodicalId\":364285,\"journal\":{\"name\":\"2020 IEEE 5th International Conference on Integrated Circuits and Microsystems (ICICM)\",\"volume\":\"245 1\",\"pages\":\"0\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"2020-10-23\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"0\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"2020 IEEE 5th International Conference on Integrated Circuits and Microsystems (ICICM)\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1109/ICICM50929.2020.9292306\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"2020 IEEE 5th International Conference on Integrated Circuits and Microsystems (ICICM)","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/ICICM50929.2020.9292306","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
A Novel Laplace Transform Modeling for Supply Induced Jitter Sensitivity of SERDES Transmitter
This paper provides supply-induced jitter-aware sensitivity and systematic modeling approach for analyzing supply noise induced timing jitter in high-speed I/O interfaces with using the Laplace transform method to perform the jitter generated by the supply noise in the time domain compared to present general analysis methods. One of the proposed models is the supply induced jitter transfer function. The proposed methodology provides an appropriate level of correlation and efficient method on high speed interface at system level the approach captures the interaction of the blocks through the regulators and the power distribution network (PDN). The goal is to provide sufficient performance for efficient system solutions in the early stages of design and achieve success at the system level.