Layong Luo, Gaogang Xie, Kave Salamatian, S. Uhlig, L. Mathy, Yingke Xie
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引用次数: 15
摘要
虚拟路由器作为实现网络虚拟化的重要组成部分,正受到越来越多的研究。在一个虚拟路由器平台中,多个虚拟路由器实例共存,每个实例都有自己的FIB (Forwarding Information Base)。在这种情况下,内存可伸缩性和路由更新是两个主要挑战。现有的方法解决了其中一个挑战,但不能同时解决这两个挑战。在本文中,我们提出了一种三树合并方法,该方法通过合并的三树和下一跳指针数组表紧凑地表示多个fib,以实现良好的内存可伸缩性,同时通过避免在合并过程中使用叶推来支持快速增量更新。实验结果表明,存储合并树需要有限的内存空间,例如,我们只需要10MB的内存空间来存储来自IPv4核心路由器的14个完整FIBs的合并树,与单个尝试的总大小相比,实现了87%的内存减少。我们在基于SRAM(静态随机存取存储器)的查找管道中实现我们的方法。使用我们的方法,带有5个外部阶段的基于sram的片上查找管道足以存储14个完整的IPv4 fib。此外,我们的方法可以保证每次更新一个写泡的最小更新开销,以及每个时钟周期一次查找的高查找吞吐量,这相当于实现中每秒2.51亿次查找的吞吐量。
A trie merging approach with incremental updates for virtual routers
Virtual routers are increasingly being studied, as an important building block to enable network virtualization. In a virtual router platform, multiple virtual router instances coexist, each having its own FIB (Forwarding Information Base). In this context, memory scalability and route updates are two major challenges. Existing approaches addressed one of these challenges but not both. In this paper, we present a trie merging approach, which compactly represents multiple FIBs by a merged trie and a table of next-hop-pointer arrays to achieve good memory scalability, while supporting fast incremental updates by avoiding the use of leaf pushing during merging. Experimental results show that storing the merged trie requires limited memory space, e.g., we only need 10MB memory space to store the merged trie for 14 full FIBs from IPv4 core routers, achieving a memory reduction by 87% when compared to the total size of the individual tries. We implement our approach in an SRAM (Static Random Access Memory)-based lookup pipeline. Using our approach, an on-chip SRAM-based lookup pipeline with 5 external stages is sufficient to store the 14 full IPv4 FIBs. Furthermore, our approach can guarantee a minimum update overhead of one write bubble per update, as well as a high lookup throughput of one lookup per clock cycle, which corresponds to a throughput of 251 million lookups per second in the implementation.