H. Choi, Ji-Seon Paek, Hyun-Yong Lee, Songcheol Hong
{"title":"用于低码调幅失真极性发射机的数字控制包络调制器","authors":"H. Choi, Ji-Seon Paek, Hyun-Yong Lee, Songcheol Hong","doi":"10.1109/RWS.2011.5725512","DOIUrl":null,"url":null,"abstract":"This paper presents a digitally controlled envelope modulator with low code-AM distortion that can be used as a building block in a digital to RF polar transmitter. The RF envelope signal modulation is performed by digitally controlling the number of activated unit amplifier cells. The phase modulated LO input signal drives a switching transistor gate of the each cell. The 8-bit cell array has 63 unary-weighted cells for MSB 6 bits and 3 segmented unary-weighted cells for LSB 2 bits. Low code-AM distortion is achieved by introducing a current source below the switch transistor in the unit cell. A Class E output matching network is used for the high drain efficiency. The proposed modulator delivers 4.91-dBm peak output power at 970MHz with the power consumption of 28.4mW. An EDGE signal is applied to demonstrate the dynamic operations. It is fabricated in 0.13µm CMOS process and the chip size without pad is 380um Χ770um.","PeriodicalId":250672,"journal":{"name":"2011 IEEE Radio and Wireless Symposium","volume":"131 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2011-03-07","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"0","resultStr":"{\"title\":\"Digitally controlled envelope modulator for a polar transmitter with low code-AM distortion\",\"authors\":\"H. Choi, Ji-Seon Paek, Hyun-Yong Lee, Songcheol Hong\",\"doi\":\"10.1109/RWS.2011.5725512\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"This paper presents a digitally controlled envelope modulator with low code-AM distortion that can be used as a building block in a digital to RF polar transmitter. The RF envelope signal modulation is performed by digitally controlling the number of activated unit amplifier cells. The phase modulated LO input signal drives a switching transistor gate of the each cell. The 8-bit cell array has 63 unary-weighted cells for MSB 6 bits and 3 segmented unary-weighted cells for LSB 2 bits. Low code-AM distortion is achieved by introducing a current source below the switch transistor in the unit cell. A Class E output matching network is used for the high drain efficiency. The proposed modulator delivers 4.91-dBm peak output power at 970MHz with the power consumption of 28.4mW. An EDGE signal is applied to demonstrate the dynamic operations. It is fabricated in 0.13µm CMOS process and the chip size without pad is 380um Χ770um.\",\"PeriodicalId\":250672,\"journal\":{\"name\":\"2011 IEEE Radio and Wireless Symposium\",\"volume\":\"131 1\",\"pages\":\"0\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"2011-03-07\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"0\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"2011 IEEE Radio and Wireless Symposium\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1109/RWS.2011.5725512\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"2011 IEEE Radio and Wireless Symposium","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/RWS.2011.5725512","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
引用次数: 0
摘要
本文提出了一种具有低编码-调幅失真的数字控制包络调制器,可作为数字-射频极向发射机的基本组成部分。射频包络信号调制是通过数字控制激活的单元放大器单元的数量来实现的。相位调制的LO输入信号驱动每个单元的开关晶体管栅极。8位单元阵列为msb6位具有63个一元加权单元,为lsb2位具有3个分段一元加权单元。低码调幅失真是通过在单元格的开关晶体管下面引入电流源实现的。采用E类输出匹配网络,漏极效率高。所提出的调制器在970MHz时提供4.91 dbm的峰值输出功率,功耗为28.4mW。应用EDGE信号来演示动态操作。它采用0.13 μ m CMOS工艺制造,芯片尺寸为380um Χ770um。
Digitally controlled envelope modulator for a polar transmitter with low code-AM distortion
This paper presents a digitally controlled envelope modulator with low code-AM distortion that can be used as a building block in a digital to RF polar transmitter. The RF envelope signal modulation is performed by digitally controlling the number of activated unit amplifier cells. The phase modulated LO input signal drives a switching transistor gate of the each cell. The 8-bit cell array has 63 unary-weighted cells for MSB 6 bits and 3 segmented unary-weighted cells for LSB 2 bits. Low code-AM distortion is achieved by introducing a current source below the switch transistor in the unit cell. A Class E output matching network is used for the high drain efficiency. The proposed modulator delivers 4.91-dBm peak output power at 970MHz with the power consumption of 28.4mW. An EDGE signal is applied to demonstrate the dynamic operations. It is fabricated in 0.13µm CMOS process and the chip size without pad is 380um Χ770um.