Design and measurements of a 28 GHz High-Linearity LNA in 45nm SOI-CMOS

This work shows the design and measurements of a 28 GHz low-noise amplifier, realized in Globalfoundries 45nm RFSOI CMOS technology. The enhanced linearity concept is based on the modified derivative superposition method. The presented measurements confirm a high IIP3 of 10 dBm, a power gain of 9 dB, a noise figure of 3.1 dB, and a total power consumption 34 mW from a 1.8 V supply voltage. The amplifier topology is built around an inductively degenerated, differential cascode amplifier with baluns and GSG pads at the input and output ports. In this paper, we extend our previous research results by providing deeper design insight, as well as experimental verification and comparison of the measurement results with the simulations.