{"title":"方法开发了一个基于fpga的安全相关、通信完整的计算机系统","authors":"Emil Gracic, A. Hayek, J. Borcsok","doi":"10.1109/BIHTEL.2014.6987642","DOIUrl":null,"url":null,"abstract":"This paper describes the implementation and integration process of a complete communication computer system on the field programmable gate array (FPGA). After such a design is reached, safety measures are integrated to achieve a safety-related architecture. For this purpose a diagnostic unit will be implemented, consisting of hardware and software tests. Hardware tests are related to the control of the FPGA functionality. They are based on the integration of two existing methods to reach complete hardware test coverage. The software tests are used for a continuous testing of the whole system (this means testing the central processing unit, bus systems, peripherals and memory). Furthermore, a safety multiplexer is integrated with the task to turn off the current operating system (main system) and to turn on a redundant system when a failure is introduced via the diagnostic unit. The safety multiplexer has to give the permission to the redundant system to receive the outputs from the main system in a way that is free from faults. The microcontroller ColdFire is used as a basis, which provides numerous features for the control of various peripherals as well as the connection of various types of memory.","PeriodicalId":415492,"journal":{"name":"2014 X International Symposium on Telecommunications (BIHTEL)","volume":"10 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2014-12-18","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"0","resultStr":"{\"title\":\"Approach to the development of an FPGA-based safety-related, complete communication computer system\",\"authors\":\"Emil Gracic, A. Hayek, J. Borcsok\",\"doi\":\"10.1109/BIHTEL.2014.6987642\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"This paper describes the implementation and integration process of a complete communication computer system on the field programmable gate array (FPGA). After such a design is reached, safety measures are integrated to achieve a safety-related architecture. For this purpose a diagnostic unit will be implemented, consisting of hardware and software tests. Hardware tests are related to the control of the FPGA functionality. They are based on the integration of two existing methods to reach complete hardware test coverage. The software tests are used for a continuous testing of the whole system (this means testing the central processing unit, bus systems, peripherals and memory). Furthermore, a safety multiplexer is integrated with the task to turn off the current operating system (main system) and to turn on a redundant system when a failure is introduced via the diagnostic unit. The safety multiplexer has to give the permission to the redundant system to receive the outputs from the main system in a way that is free from faults. The microcontroller ColdFire is used as a basis, which provides numerous features for the control of various peripherals as well as the connection of various types of memory.\",\"PeriodicalId\":415492,\"journal\":{\"name\":\"2014 X International Symposium on Telecommunications (BIHTEL)\",\"volume\":\"10 1\",\"pages\":\"0\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"2014-12-18\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"0\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"2014 X International Symposium on Telecommunications (BIHTEL)\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1109/BIHTEL.2014.6987642\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"2014 X International Symposium on Telecommunications (BIHTEL)","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/BIHTEL.2014.6987642","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
Approach to the development of an FPGA-based safety-related, complete communication computer system
This paper describes the implementation and integration process of a complete communication computer system on the field programmable gate array (FPGA). After such a design is reached, safety measures are integrated to achieve a safety-related architecture. For this purpose a diagnostic unit will be implemented, consisting of hardware and software tests. Hardware tests are related to the control of the FPGA functionality. They are based on the integration of two existing methods to reach complete hardware test coverage. The software tests are used for a continuous testing of the whole system (this means testing the central processing unit, bus systems, peripherals and memory). Furthermore, a safety multiplexer is integrated with the task to turn off the current operating system (main system) and to turn on a redundant system when a failure is introduced via the diagnostic unit. The safety multiplexer has to give the permission to the redundant system to receive the outputs from the main system in a way that is free from faults. The microcontroller ColdFire is used as a basis, which provides numerous features for the control of various peripherals as well as the connection of various types of memory.