T.-N Quang, H. Chiu, Yu-Kang Lo, C.-Y Yang, Hongbo Ma
{"title":"带抽头电感的高压增益升压DC-DC变换器","authors":"T.-N Quang, H. Chiu, Yu-Kang Lo, C.-Y Yang, Hongbo Ma","doi":"10.1109/PEAC.2014.7038091","DOIUrl":null,"url":null,"abstract":"This study presents a novel topology named high voltage-gain boost DC-DC converter with tapped-inductor. The proposed topology provides a high voltage-gain and low input current ripple which are suitable for alternative power sources such as PV and fuel-cell applications. The interleaved control mode can be used to reduce input and output filtering. Moreover, the voltage stress on MOSFETs are clamped, resulting of low on-resistance (RDS(ON)) MOSFET usage to improve efficiency. Addition to providing circuit operation and analysis with symmetric control and interleaved control modes, a simulation and laboratory prototype of the proposed topology was built and inspected under 15-28 V input, 400 V/250 W output and 100 kHz switching frequency. The results showed that the proposed circuit achieved low voltage spikes on MOSFETs. Low RDS(ON) MOSFETs were used to improved efficiency. For interleaved control mode, the input current ripple and output voltage ripple were low, requiring smaller input and output filtering.","PeriodicalId":309780,"journal":{"name":"2014 International Power Electronics and Application Conference and Exposition","volume":"10 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2014-11-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"2","resultStr":"{\"title\":\"High voltage-gain boost DC-DC converter with tapped-inductor\",\"authors\":\"T.-N Quang, H. Chiu, Yu-Kang Lo, C.-Y Yang, Hongbo Ma\",\"doi\":\"10.1109/PEAC.2014.7038091\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"This study presents a novel topology named high voltage-gain boost DC-DC converter with tapped-inductor. The proposed topology provides a high voltage-gain and low input current ripple which are suitable for alternative power sources such as PV and fuel-cell applications. The interleaved control mode can be used to reduce input and output filtering. Moreover, the voltage stress on MOSFETs are clamped, resulting of low on-resistance (RDS(ON)) MOSFET usage to improve efficiency. Addition to providing circuit operation and analysis with symmetric control and interleaved control modes, a simulation and laboratory prototype of the proposed topology was built and inspected under 15-28 V input, 400 V/250 W output and 100 kHz switching frequency. The results showed that the proposed circuit achieved low voltage spikes on MOSFETs. Low RDS(ON) MOSFETs were used to improved efficiency. For interleaved control mode, the input current ripple and output voltage ripple were low, requiring smaller input and output filtering.\",\"PeriodicalId\":309780,\"journal\":{\"name\":\"2014 International Power Electronics and Application Conference and Exposition\",\"volume\":\"10 1\",\"pages\":\"0\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"2014-11-01\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"2\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"2014 International Power Electronics and Application Conference and Exposition\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1109/PEAC.2014.7038091\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"2014 International Power Electronics and Application Conference and Exposition","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/PEAC.2014.7038091","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
High voltage-gain boost DC-DC converter with tapped-inductor
This study presents a novel topology named high voltage-gain boost DC-DC converter with tapped-inductor. The proposed topology provides a high voltage-gain and low input current ripple which are suitable for alternative power sources such as PV and fuel-cell applications. The interleaved control mode can be used to reduce input and output filtering. Moreover, the voltage stress on MOSFETs are clamped, resulting of low on-resistance (RDS(ON)) MOSFET usage to improve efficiency. Addition to providing circuit operation and analysis with symmetric control and interleaved control modes, a simulation and laboratory prototype of the proposed topology was built and inspected under 15-28 V input, 400 V/250 W output and 100 kHz switching frequency. The results showed that the proposed circuit achieved low voltage spikes on MOSFETs. Low RDS(ON) MOSFETs were used to improved efficiency. For interleaved control mode, the input current ripple and output voltage ripple were low, requiring smaller input and output filtering.