L. Gantel, Salah Layouni, M. A. Benkhelifa, F. Verdier, S. Chauvet
{"title":"可重构平台中的多处理器任务迁移实现","authors":"L. Gantel, Salah Layouni, M. A. Benkhelifa, F. Verdier, S. Chauvet","doi":"10.1109/ReConFig.2009.37","DOIUrl":null,"url":null,"abstract":"Mutiprocessor architecture in embedded computing is becoming widely used. In fact, with specific development tools, platforms such as Xilinx Virtex-5 or Virtex-6 FPGA can implement multiprocessor systems (with soft-core and hard-core processors) {with just a few mouse clicks} and offer the possibility of partial and dynamic reconfiguration. Software tasks are scheduled on these platforms by embedded and distributed Real Time Operating System (RTOS). To provide high performance (execution time, power consumption...) to these Multiprocessor Soc (MPSoC) platforms, the RTOS can enable the migration of software tasks between processors. Our work deals with the study and the development of a software layer (an application programming interface) which allows task migration between soft-core processors. The soft-core can be dynamically loaded on FPGA on demand. In this paper, we present a platform that merges these two aspects, partial reconfiguration and software task migration in the context of MPSoCs. We notably investigate the incurred time and overhead for task migration and partial reconfiguration.","PeriodicalId":325631,"journal":{"name":"2009 International Conference on Reconfigurable Computing and FPGAs","volume":"114 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2009-12-09","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"23","resultStr":"{\"title\":\"Multiprocessor Task Migration Implementation in a Reconfigurable Platform\",\"authors\":\"L. Gantel, Salah Layouni, M. A. Benkhelifa, F. Verdier, S. Chauvet\",\"doi\":\"10.1109/ReConFig.2009.37\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"Mutiprocessor architecture in embedded computing is becoming widely used. In fact, with specific development tools, platforms such as Xilinx Virtex-5 or Virtex-6 FPGA can implement multiprocessor systems (with soft-core and hard-core processors) {with just a few mouse clicks} and offer the possibility of partial and dynamic reconfiguration. Software tasks are scheduled on these platforms by embedded and distributed Real Time Operating System (RTOS). To provide high performance (execution time, power consumption...) to these Multiprocessor Soc (MPSoC) platforms, the RTOS can enable the migration of software tasks between processors. Our work deals with the study and the development of a software layer (an application programming interface) which allows task migration between soft-core processors. The soft-core can be dynamically loaded on FPGA on demand. In this paper, we present a platform that merges these two aspects, partial reconfiguration and software task migration in the context of MPSoCs. We notably investigate the incurred time and overhead for task migration and partial reconfiguration.\",\"PeriodicalId\":325631,\"journal\":{\"name\":\"2009 International Conference on Reconfigurable Computing and FPGAs\",\"volume\":\"114 1\",\"pages\":\"0\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"2009-12-09\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"23\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"2009 International Conference on Reconfigurable Computing and FPGAs\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1109/ReConFig.2009.37\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"2009 International Conference on Reconfigurable Computing and FPGAs","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/ReConFig.2009.37","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
Multiprocessor Task Migration Implementation in a Reconfigurable Platform
Mutiprocessor architecture in embedded computing is becoming widely used. In fact, with specific development tools, platforms such as Xilinx Virtex-5 or Virtex-6 FPGA can implement multiprocessor systems (with soft-core and hard-core processors) {with just a few mouse clicks} and offer the possibility of partial and dynamic reconfiguration. Software tasks are scheduled on these platforms by embedded and distributed Real Time Operating System (RTOS). To provide high performance (execution time, power consumption...) to these Multiprocessor Soc (MPSoC) platforms, the RTOS can enable the migration of software tasks between processors. Our work deals with the study and the development of a software layer (an application programming interface) which allows task migration between soft-core processors. The soft-core can be dynamically loaded on FPGA on demand. In this paper, we present a platform that merges these two aspects, partial reconfiguration and software task migration in the context of MPSoCs. We notably investigate the incurred time and overhead for task migration and partial reconfiguration.