Selective harmonic elimination and current/voltage control in current/voltage source topologies: a unified approach

This paper presents a unified approach for generating pulse-width-modulated (PWM) patterns for current source rectifiers and inverters (CSR/Is) that provide (a) unconstrained selective harmonic elimination (SHE), and (b) fundamental current control. The approach uses the chopping angles or gating patterns developed for voltage source rectifiers and inverters (VSR/Is) in combination with a logic circuit to generate the gating patterns for CSR/Is. The circuit also includes naturally and symmetrically distributed shorting pulses. Thus, the approach avoids the hassle of (a) positioning the shorting pulses, and (b) defining and solving a set of nonlinear equations dedicated to CSR/Is. Moreover, the approach can eliminate an even or odd arbitrary number of harmonics (e.g., fundamental current control and elimination of the 5th, 7th, and 11th harmonics). This is an improvement on existing techniques and a new approach to pattern generation. Simulated and experimental results are presented to validate the effectiveness of the approach.