最小的自校正移位计数器

A.M. Tokarnia, A. Peterson
{"title":"最小的自校正移位计数器","authors":"A.M. Tokarnia, A. Peterson","doi":"10.1109/ICCD.1995.528925","DOIUrl":null,"url":null,"abstract":"In some applications of shift counters, self initialization is an advantage. It eliminates the need for complex initialization and guarantees the return to the original state sequence after a temporary failure. The low operating frequencies and large areas of the available self correcting shift counters, however, impose severe limitations to their use. This poor performance is partially due to a widely used design method. It consists of modifying the state diagram of a counter with the desired modulus until a single cycle is left. Due to the additional hardware required to change state transitions, the final circuit tends to be slow and large. The paper presents a technique for determining self correcting shift counters by selecting the feedback functions from a large set of functions. The set is searched for functions satisfying a minimization criterion. Self correcting shift counters with up to 10 stages have been determined. These counters are faster and smaller than the self correcting shift counters available from the literature. A table of self correcting shift counters with 6 stages is included in the paper.","PeriodicalId":281907,"journal":{"name":"Proceedings of ICCD '95 International Conference on Computer Design. VLSI in Computers and Processors","volume":"57 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"1995-10-02","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"0","resultStr":"{\"title\":\"Minimal self-correcting shift counters\",\"authors\":\"A.M. Tokarnia, A. Peterson\",\"doi\":\"10.1109/ICCD.1995.528925\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"In some applications of shift counters, self initialization is an advantage. It eliminates the need for complex initialization and guarantees the return to the original state sequence after a temporary failure. The low operating frequencies and large areas of the available self correcting shift counters, however, impose severe limitations to their use. This poor performance is partially due to a widely used design method. It consists of modifying the state diagram of a counter with the desired modulus until a single cycle is left. Due to the additional hardware required to change state transitions, the final circuit tends to be slow and large. The paper presents a technique for determining self correcting shift counters by selecting the feedback functions from a large set of functions. The set is searched for functions satisfying a minimization criterion. Self correcting shift counters with up to 10 stages have been determined. These counters are faster and smaller than the self correcting shift counters available from the literature. A table of self correcting shift counters with 6 stages is included in the paper.\",\"PeriodicalId\":281907,\"journal\":{\"name\":\"Proceedings of ICCD '95 International Conference on Computer Design. VLSI in Computers and Processors\",\"volume\":\"57 1\",\"pages\":\"0\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"1995-10-02\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"0\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"Proceedings of ICCD '95 International Conference on Computer Design. VLSI in Computers and Processors\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1109/ICCD.1995.528925\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"Proceedings of ICCD '95 International Conference on Computer Design. VLSI in Computers and Processors","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/ICCD.1995.528925","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
引用次数: 0

摘要

在移位计数器的某些应用中,自初始化是一个优点。它消除了复杂初始化的需要,并保证在临时故障后返回到原始状态序列。然而,现有的自校正移位计数器的低工作频率和大面积对其使用施加了严重的限制。这种较差的性能部分是由于广泛使用的设计方法。它包括用所需的模数修改计数器的状态图,直到剩下一个周期。由于需要额外的硬件来改变状态转换,最终电路往往是缓慢和庞大的。本文提出了一种从大量函数中选择反馈函数来确定自校正移位计数器的方法。在集合中搜索满足最小化准则的函数。自校正移位计数器与多达10个阶段已确定。这些计数器比文献中提供的自校正移位计数器更快、更小。给出了一种6级自校正移位计数器表。
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Minimal self-correcting shift counters
In some applications of shift counters, self initialization is an advantage. It eliminates the need for complex initialization and guarantees the return to the original state sequence after a temporary failure. The low operating frequencies and large areas of the available self correcting shift counters, however, impose severe limitations to their use. This poor performance is partially due to a widely used design method. It consists of modifying the state diagram of a counter with the desired modulus until a single cycle is left. Due to the additional hardware required to change state transitions, the final circuit tends to be slow and large. The paper presents a technique for determining self correcting shift counters by selecting the feedback functions from a large set of functions. The set is searched for functions satisfying a minimization criterion. Self correcting shift counters with up to 10 stages have been determined. These counters are faster and smaller than the self correcting shift counters available from the literature. A table of self correcting shift counters with 6 stages is included in the paper.
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