Restructuring the Digital Systems Laboratory in Computer Engineering Course

It's not difficult to find students of Computer Engineering, at the University of São Paulo, in São Carlos School of Engineering, complaining about the way that practical classes are given during the graduation. What is said is that these classes only reproduce results already seen in theory classes, that they are limited by a laboratory script and, at the end, nothing new is added to their knowledge, making them a little bit frustrated about the classes. In this paper, it's shown how PBL (Problem-based Learning) was used in Digital Systems Laboratory, a 4-semester discipline, to start a change in this situation. The main purpose of the project was to use all the knowledge in digital logic, already seen in theory classes by the students, to build the main modules of a basic processor: arithmetic logic unit (ALU), for combinational logic studies; register bank, for sequential logic studies; and control unity, used to study finite state machines. This new way to teach each topic of the discipline brought new challenges to the students, now free to solve them the way they wanted to, once only the specification of inputs and outputs were given. Using FPGA boards and circuit simulators for development, the students succeeded in their task and the modules were built and tested in a test platform, developed to allow the simulation of the entire processor. This project had a positive feedback, either reflected in grades (in laboratory and in related theoretical disciplines) and also in the student's motivation (although some difficulties was found) helping them to understand how different concepts seen during the graduation course are related. This feedback is now helping the development of a new material for next classes, in order to make specifications clearer, correct bugs in the test platform and improve some features for debug.