45纳米CMOS 4位闪存模数转换器

Vivek Urankar, Chiranjit R Patel, B. A. Vivek, V. Bharadwaj
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引用次数: 0

摘要

信号处理和通信系统广泛依赖于模数转换器(ADC)。低功耗仍然是布局设计的一大优势。本研究提出了一种采用CMOS 45纳米技术的4位闪存ADC。本文还讨论了作为ADC组成部分的运算放大器的设计。为了提高ADC的性能,设计了一个频率范围为±5MHz,工作电压为2.5 V的高效运算放大器,用于Flash ADC的核心。温度计编码器电路是一个基于逻辑的编码器建立在异或门和或门。Cadence Virtuoso电路和布局编辑器以及验证工具(LVS和DRC)用于设计不同的布局和原理图。4位Flash ADC使用9mw功率,转换延迟为1.11 μ s。
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45nm CMOS 4-Bit Flash Analog to Digital Converter
Signal processing and communication systems are widely dependent on the analog to digital converters [ADC]. Low power consumption remains as a considerable benefit from the layout design. This study presents a four bit flash ADC using CMOS 45nm technology. Operational amplifier design, which remains as the integral part of ADC is also discussed. To enable an improved performance of the ADC, a potent operational amplifier is designed with a frequency range ± 5MHz along with an operating voltage of 2.5 V for serving at the heart of Flash ADC. The thermometer encoder circuit is a logic-based encoder built upon XOR and OR gates. Cadence Virtuoso circuit and layout editor along with verification tools (LVS and DRC) are used to design different layouts and schematics. The 4-Bit Flash ADC uses 9 mW of power with a delay of $1.11 \mu s$ in conversion.
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