基于Verilog-A的红外读出集成电路建模

Xiao Wang, Zelin Shi
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摘要

红外探测器是红外成像系统的核心,而读出集成电路是探测器的关键部件。为了快速准确地掌握电路的性能,提出了一种使用Verilog-A语言进行电路建模的方法,给出了ROIC的行为仿真模型。首先介绍了一个典型的电容式跨阻抗放大器(CTIA) ROIC单元,然后从行为层面对CTIA的两个关键部件运算放大器和开关进行了建模。运放模型总结了这些非理想因素,如有限增益带宽积、输入输出偏置、输出电阻等。在开关行为模型中考虑了影响开关的非交易因素,如上升和下降时间、导通电阻等。最后提出了噪声的时域建模方法,并与经典的频域差分方法进行了比较。分析结果表明,在噪声兴趣带宽(NIBW)大于5MHz的情况下,当噪声采样率大于NIBW的4倍时,两种方法的差异小于1%
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Modeling for infrared readout integrated circuit based on Verilog-A
Infrared detectors are the core of infrared imaging systems, while readout integrated circuits are the key components of detectors. In order to grasp the performance of circuits quickly and accurately, a method of circuit modeling using Verilog-A language is proposed, which present a behavioral simulation model for the ROIC. At first, a typical capacitor trans-impedance amplifier(CTIA) ROIC unit is showed, then the two essential parts of it,operational amplifier and switch are modeled on behavioral level. The op amp model concludes these non-ideal factors, such as finite gain-bandwidth product, input and output offset, output resistance and so on. Non-deal factors that affect switches are considered in the switch behavioral model, such as rise and fall time, on-resistance and so on. At last time-domain modeling method for noise is presented, which is compared with the classical frequency domain method for difference. The analysis results shows that in the situation that noise interested bandwidth(NIBW) is more than 5MHz, the difference between the two methods leads to less than 1% if the sample rate of noise is larger 4 times of the NIBW
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