K. Kumaran, G. A. Bhanumithra, R. Rathi, M. M. Priya
{"title":"利用MBFA-10T提高进位跳加器的效率","authors":"K. Kumaran, G. A. Bhanumithra, R. Rathi, M. M. Priya","doi":"10.1109/ICNETS2.2017.8067903","DOIUrl":null,"url":null,"abstract":"The objective of this paper is to reduce the propagation time of carry skip adder(CSA) and also minimize the area by using MUX based full adder (MBFA-10T). The efficiency of the CSA has been improved by replacing the full adders with MUX based full adder circuit. Using this approach the delay, number of required transistors and the area has been diminished while comparing it to the existing one. The results are obtained after design, simulation and timing analysis was done using SPICE tool. From the results it shows that the transistors used in MBFA is only ten, which is less than that of the CMOS Full Adder (FA).","PeriodicalId":413865,"journal":{"name":"2017 International Conference on Nextgen Electronic Technologies: Silicon to Software (ICNETS2)","volume":"1 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2017-03-23","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"0","resultStr":"{\"title\":\"Enhancing the efficiency of carry skip adder using MBFA-10T\",\"authors\":\"K. Kumaran, G. A. Bhanumithra, R. Rathi, M. M. Priya\",\"doi\":\"10.1109/ICNETS2.2017.8067903\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"The objective of this paper is to reduce the propagation time of carry skip adder(CSA) and also minimize the area by using MUX based full adder (MBFA-10T). The efficiency of the CSA has been improved by replacing the full adders with MUX based full adder circuit. Using this approach the delay, number of required transistors and the area has been diminished while comparing it to the existing one. The results are obtained after design, simulation and timing analysis was done using SPICE tool. From the results it shows that the transistors used in MBFA is only ten, which is less than that of the CMOS Full Adder (FA).\",\"PeriodicalId\":413865,\"journal\":{\"name\":\"2017 International Conference on Nextgen Electronic Technologies: Silicon to Software (ICNETS2)\",\"volume\":\"1 1\",\"pages\":\"0\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"2017-03-23\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"0\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"2017 International Conference on Nextgen Electronic Technologies: Silicon to Software (ICNETS2)\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1109/ICNETS2.2017.8067903\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"2017 International Conference on Nextgen Electronic Technologies: Silicon to Software (ICNETS2)","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/ICNETS2.2017.8067903","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
Enhancing the efficiency of carry skip adder using MBFA-10T
The objective of this paper is to reduce the propagation time of carry skip adder(CSA) and also minimize the area by using MUX based full adder (MBFA-10T). The efficiency of the CSA has been improved by replacing the full adders with MUX based full adder circuit. Using this approach the delay, number of required transistors and the area has been diminished while comparing it to the existing one. The results are obtained after design, simulation and timing analysis was done using SPICE tool. From the results it shows that the transistors used in MBFA is only ten, which is less than that of the CMOS Full Adder (FA).