一款紧凑型低功耗24ghz收发器,适用于0.13µm CMOS雷达应用

Vadim Issakov, M. Tiebout, K. Mertens, Yiqun Cao, Andreas Thiede, W. Simbürger, Linus Maurer
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引用次数: 13

摘要

本文提出了一种集成0.13 μm CMOS技术的小型低功耗24 GHz雷达收发器。高集成度包括一个低噪声放大器(LNA),两个混频器,片上正交发生器,一个压控振荡器(VCO),一个功率放大器(PA)驱动器和四分频,最小面积为0.7 mm2。直接转换接收器的转换增益为12 dB, DSB噪声系数为5.5 dB,而发射器的输出功率为-3 dBm,相位噪声为-101 dBc/Hz。该电路仅消耗88兆瓦从一个1.5 V电源。
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A compact low-power 24 GHz transceiver for radar applications in 0.13 µm CMOS
This paper presents a compact low-power transceiver for 24 GHz radar applications integrated in 0.13 μm CMOS technology. The high integration level includes a low-noise amplifier (LNA), two mixers, on-chip quadrature generation, a voltage-controlled oscillator (VCO), a power amplifier (PA) driver and frequency division by four at a record minimal area of 0.7 mm2. The direct-conversion receiver offers a conversion gain of 12 dB and a DSB noise figure of 5.5 dB, whilst the transmitter provides an output power of -3 dBm with a phase noise of -101 dBc/Hz. The circuit consumes only 88 mW from a single 1.5 V supply.
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