Liliana Margarita Espinosa Jimenez, Michael Opoku Agyeman
{"title":"提高指令级并行性的技术研究","authors":"Liliana Margarita Espinosa Jimenez, Michael Opoku Agyeman","doi":"10.1145/3284557.3284562","DOIUrl":null,"url":null,"abstract":"Instruction Level Parallelism (ILP) is the number of instructions that can be executed in simultaneously a program in a clock cycle. The microprocessors exploit ILP by means of several techniques that have been implemented in the last decades and according to the advances that have been obtained in hardware, this survey presents the different techniques that have been used successfully in the execution of multiple instructions of a single program in a single clock cycle.","PeriodicalId":272487,"journal":{"name":"Proceedings of the 2nd International Symposium on Computer Science and Intelligent Control","volume":"75 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2018-09-21","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"2","resultStr":"{\"title\":\"A Study of Techniques to Increase Instruction Level Parallelisms\",\"authors\":\"Liliana Margarita Espinosa Jimenez, Michael Opoku Agyeman\",\"doi\":\"10.1145/3284557.3284562\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"Instruction Level Parallelism (ILP) is the number of instructions that can be executed in simultaneously a program in a clock cycle. The microprocessors exploit ILP by means of several techniques that have been implemented in the last decades and according to the advances that have been obtained in hardware, this survey presents the different techniques that have been used successfully in the execution of multiple instructions of a single program in a single clock cycle.\",\"PeriodicalId\":272487,\"journal\":{\"name\":\"Proceedings of the 2nd International Symposium on Computer Science and Intelligent Control\",\"volume\":\"75 1\",\"pages\":\"0\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"2018-09-21\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"2\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"Proceedings of the 2nd International Symposium on Computer Science and Intelligent Control\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1145/3284557.3284562\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"Proceedings of the 2nd International Symposium on Computer Science and Intelligent Control","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1145/3284557.3284562","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
A Study of Techniques to Increase Instruction Level Parallelisms
Instruction Level Parallelism (ILP) is the number of instructions that can be executed in simultaneously a program in a clock cycle. The microprocessors exploit ILP by means of several techniques that have been implemented in the last decades and according to the advances that have been obtained in hardware, this survey presents the different techniques that have been used successfully in the execution of multiple instructions of a single program in a single clock cycle.