FPGA-based control of three-level inverter using Selective Harmonics Elimination PWM

This paper describes the control by the selective harmonics elimination PWM of three level inverter using FPGA device. The NPC inverter is realized with six similar modules type Mitsubishi. Each one contains two bi-directional IGBTs. To control the four semi-conductors of each leg, switching angles allowing the elimination of the 5th, 7th and the 11th harmonic have been computed basis on the SHEPWM using Newton-Raphson method. The generation of the gate signals is carried out with FPGA device type SPARTAN-3E. The device is configured using VHDL language and ModelSim to verify the correctness of the developed program. Experimental results are presented validates the proposed circuit.