FFT硬件加速器

IEEE Region 5 Conference, 1988: 'Spanning the Peaks of Electrotechnology' Pub Date : 1988-03-21 DOI:10.1109/REG5.1988.15911

O. Morales

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引用次数: 0

摘要

描述了一种新的信号处理体系结构，在接近最佳的时间内以最小的硬件执行快速傅里叶变换(FFT)。最先进的电路和精心的布局支持超快的操作。处理器能够利用微可编程控制单元执行几种信号处理算法。阵列应用程序可以方便地使用这个专用处理器作为外围数字处理器。

本文章由计算机程序翻译，如有差异，请以英文原文为准。

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FFT hardware accelerator

A novel signal processing architecture is described that performs the fast Fourier transform (FFT) in near-optimum time, with minimal hardware. State-of-the-art circuitry and careful layout support ultrafast operations. The processor is capable of executing several signal processing algorithms utilizing a microprogrammable control unit. Array applications can make convenient use of this dedicated processor as a peripheral number cruncher.<>

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IEEE Region 5 Conference, 1988: 'Spanning the Peaks of Electrotechnology'

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