使用内存时间戳记录加速多处理器仿真

K. Barr, Heidi Pan, Michael Zhang, K. Asanović
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引用次数: 50

摘要

本文介绍了一种基于内存时间戳记录(MTR)的新型软件结构的快速准确的多处理器系统目录和缓存状态初始化技术。MTR是一种通用的、压缩的内存参考模式快照,可以在快进模拟期间快速更新,或者作为检查点的一部分存储。我们使用运行一系列多线程工作负载的基于目录的缓存一致多处理器的全系统模拟来评估MTR。MTR和多处理器版本的功能快速转发(FFW)都做出了类似的性能估计,通常在我们详细模型的15%以内。除了其他好处之外,我们还展示了MTR比FFW有1.45倍的加速,比我们详细的基线有7.7倍的加速
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Accelerating Multiprocessor Simulation with a Memory Timestamp Record
We introduce a fast and accurate technique for initializing the directory and cache state of a multiprocessor system based on a novel software structure called the memory timestamp record (MTR). The MTR is a versatile, compressed snapshot of memory reference patterns which can be rapidly updated during fast-forwarded simulation, or stored as part of a checkpoint. We evaluate MTR using a full-system simulation of a directory-based cache-coherent multiprocessor running a range of multithreaded workloads. Both MTR and a multiprocessor version of functional fast-forwarding (FFW) make similar performance estimates, usually within 15% of our detailed model. In addition to other benefits, we show that MTR has up to a 1.45x speedup over FFW, and a 7.7x speedup over our detailed baseline
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